diff options
| -rw-r--r-- | lib/Target/ARM/ARMTargetMachine.cpp | 10 | ||||
| -rw-r--r-- | test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll | 1 | ||||
| -rw-r--r-- | test/CodeGen/Thumb/dyn-stackalloc.ll | 7 | ||||
| -rw-r--r-- | test/CodeGen/Thumb/thumb-ldm.ll | 1 | ||||
| -rw-r--r-- | test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll | 1 |
5 files changed, 13 insertions, 7 deletions
diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 6ef2ea4e10..c1e866be6e 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -265,7 +265,8 @@ bool ARMPassConfig::addInstSelector() { } bool ARMPassConfig::addPreRegAlloc() { - if (getOptLevel() != CodeGenOpt::None) + // FIXME: Temporarily disabling Thumb-1 pre-RA Load/Store optimization pass + if (getOptLevel() != CodeGenOpt::None && !getARMSubtarget().isThumb1Only()) addPass(createARMLoadStoreOptimizationPass(true)); if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9()) addPass(createMLxExpansionPass()); @@ -280,8 +281,11 @@ bool ARMPassConfig::addPreRegAlloc() { bool ARMPassConfig::addPreSched2() { if (getOptLevel() != CodeGenOpt::None) { - addPass(createARMLoadStoreOptimizationPass()); - printAndVerify("After ARM load / store optimizer"); + // FIXME: Temporarily disabling Thumb-1 post-RA Load/Store optimization pass + if (!getARMSubtarget().isThumb1Only()) { + addPass(createARMLoadStoreOptimizationPass()); + printAndVerify("After ARM load / store optimizer"); + } if (getARMSubtarget().hasNEON()) addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass)); diff --git a/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll b/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll index 3c43383d7a..ae663697eb 100644 --- a/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll +++ b/test/CodeGen/Thumb/2014-06-10-thumb1-ldst-opt-bug.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv6m-eabi -o - | FileCheck %s +; XFAIL: * define void @foo(i32* %A) #0 { entry: diff --git a/test/CodeGen/Thumb/dyn-stackalloc.ll b/test/CodeGen/Thumb/dyn-stackalloc.ll index 6bc39afe21..6c6de55347 100644 --- a/test/CodeGen/Thumb/dyn-stackalloc.ll +++ b/test/CodeGen/Thumb/dyn-stackalloc.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra | FileCheck %s -check-prefix=CHECK -check-prefix=RA_GREEDY -; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -regalloc=basic | FileCheck %s -check-prefix=CHECK -check-prefix=RA_BASIC +; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra | FileCheck %s +; RUN: llc < %s -mtriple=thumb-apple-darwin -disable-cgp-branch-opts -disable-post-ra -regalloc=basic | FileCheck %s %struct.state = type { i32, %struct.info*, float**, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, i64, i64, i64, i8* } %struct.info = type { i32, i32, i32, i32, i32, i32, i32, i8* } @@ -45,8 +45,7 @@ define void @t2(%struct.comment* %vc, i8* %tag, i8* %contents) { ; CHECK: sub sp, # ; CHECK: mov r[[R0:[0-9]+]], sp ; CHECK: str r{{[0-9+]}}, [r[[R0]] -; RA_GREEDY: str r{{[0-9+]}}, [r[[R0]] -; RA_BASIC: stm r[[R0]]! +; CHECK: str r{{[0-9+]}}, [r[[R0]] ; CHECK-NOT: ldr r0, [sp ; CHECK: mov r[[R1:[0-9]+]], sp ; CHECK: subs r[[R2:[0-9]+]], r[[R1]], r{{[0-9]+}} diff --git a/test/CodeGen/Thumb/thumb-ldm.ll b/test/CodeGen/Thumb/thumb-ldm.ll index dd98e6f300..95f3edc9c4 100644 --- a/test/CodeGen/Thumb/thumb-ldm.ll +++ b/test/CodeGen/Thumb/thumb-ldm.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mtriple=thumbv6m-eabi -o - | FileCheck %s +; XFAIL: * @X = external global [0 x i32] ; <[0 x i32]*> [#uses=5] diff --git a/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll b/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll index 06cfd9bbef..dedc82bf68 100644 --- a/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll +++ b/test/CodeGen/Thumb/thumb-memcpy-ldm-stm.ll @@ -1,4 +1,5 @@ ; RUN: llc -mtriple=thumbv6m-eabi %s -o - | FileCheck %s +; XFAIL: * @d = external global [64 x i32] @s = external global [64 x i32] |