diff options
| -rw-r--r-- | include/llvm/CodeGen/MachineRegisterInfo.h | 8 | ||||
| -rw-r--r-- | lib/CodeGen/MachineCSE.cpp | 9 | ||||
| -rw-r--r-- | lib/CodeGen/MachineRegisterInfo.cpp | 14 |
3 files changed, 24 insertions, 7 deletions
diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index 066c91b36c..ddba61bf18 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -203,6 +203,14 @@ public: /// void setRegClass(unsigned Reg, const TargetRegisterClass *RC); + /// constrainRegClass - Constrain the register class of the specified virtual + /// register to be a common subclass of RC and the current register class. + /// Return the new register class, or NULL if no such class exists. + /// This should only be used when the constraint is known to be trivial, like + /// GR32 -> GR32_NOSP. Beware of increasing register pressure. + const TargetRegisterClass *constrainRegClass(unsigned Reg, + const TargetRegisterClass *RC); + /// createVirtualRegister - Create and return a new virtual register in the /// function with the specified register class. /// diff --git a/lib/CodeGen/MachineCSE.cpp b/lib/CodeGen/MachineCSE.cpp index 272b54dea1..9d09f608ee 100644 --- a/lib/CodeGen/MachineCSE.cpp +++ b/lib/CodeGen/MachineCSE.cpp @@ -120,17 +120,12 @@ bool MachineCSE::PerformTrivialCoalescing(MachineInstr *MI, continue; if (DefMI->getOperand(0).getSubReg() || DefMI->getOperand(1).getSubReg()) continue; - const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg); - const TargetRegisterClass *RC = MRI->getRegClass(Reg); - const TargetRegisterClass *NewRC = getCommonSubClass(RC, SRC); - if (!NewRC) + if (!MRI->constrainRegClass(SrcReg, MRI->getRegClass(Reg))) continue; DEBUG(dbgs() << "Coalescing: " << *DefMI); - DEBUG(dbgs() << "*** to: " << *MI); + DEBUG(dbgs() << "*** to: " << *MI); MO.setReg(SrcReg); MRI->clearKillFlags(SrcReg); - if (NewRC != SRC) - MRI->setRegClass(SrcReg, NewRC); DefMI->eraseFromParent(); ++NumCoalesces; Changed = true; diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp index 5d852f26be..7b839f07e7 100644 --- a/lib/CodeGen/MachineRegisterInfo.cpp +++ b/lib/CodeGen/MachineRegisterInfo.cpp @@ -60,6 +60,20 @@ MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { RegClass2VRegMap[RC->getID()].push_back(VR); } +const TargetRegisterClass * +MachineRegisterInfo::constrainRegClass(unsigned Reg, + const TargetRegisterClass *RC) { + const TargetRegisterClass *OldRC = getRegClass(Reg); + if (OldRC == RC) + return RC; + const TargetRegisterClass *NewRC = getCommonSubClass(OldRC, RC); + if (!NewRC) + return 0; + if (NewRC != OldRC) + setRegClass(Reg, NewRC); + return NewRC; +} + /// createVirtualRegister - Create and return a new virtual register in the /// function with the specified register class. /// |