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Diffstat (limited to 'lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp5
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 88e72ecd92..182b7f3e68 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -2098,9 +2098,8 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
EVT VT = LHSL.getValueType();
// If the shift amount operand is coming from a vector legalization it may
- // have an illegal type. Fix that first by casting the operand. Otherwise
- // the new SHL_PARTS operation would need further legalization, and the
- // legalizer assumes that illegal SHL_PARTS never occur.
+ // have an illegal type. Fix that first by casting the operand, otherwise
+ // the new SHL_PARTS operation would need further legalization.
SDValue ShiftOp = N->getOperand(1);
MVT ShiftTy = TLI.getShiftAmountTy(VT);
assert(ShiftTy.getSizeInBits() >= Log2_32_Ceil(VT.getSizeInBits()) &&