diff options
Diffstat (limited to 'lib/Target/ARM64')
| -rw-r--r-- | lib/Target/ARM64/ARM64ISelLowering.h | 2 | ||||
| -rw-r--r-- | lib/Target/ARM64/ARM64InstrInfo.h | 6 | ||||
| -rw-r--r-- | lib/Target/ARM64/ARM64RegisterInfo.h | 4 | ||||
| -rw-r--r-- | lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h | 4 |
4 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/ARM64/ARM64ISelLowering.h b/lib/Target/ARM64/ARM64ISelLowering.h index d8710b0127..ebecedccd5 100644 --- a/lib/Target/ARM64/ARM64ISelLowering.h +++ b/lib/Target/ARM64/ARM64ISelLowering.h @@ -190,7 +190,7 @@ public: /// allowsUnalignedMemoryAccesses - Returns true if the target allows /// unaligned memory accesses. of the specified type. bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AddrSpace = 0, - bool *Fast = 0) const override { + bool *Fast = nullptr) const override { if (RequireStrictAlign) return false; // FIXME: True for Cyclone, but not necessary others. diff --git a/lib/Target/ARM64/ARM64InstrInfo.h b/lib/Target/ARM64/ARM64InstrInfo.h index 7f02e94cb2..03822e1c3b 100644 --- a/lib/Target/ARM64/ARM64InstrInfo.h +++ b/lib/Target/ARM64/ARM64InstrInfo.h @@ -193,9 +193,9 @@ enum ARM64FrameOffsetStatus { /// (possibly with @p OutUnscaledOp if OutUseUnscaledOp is true) and that /// is a legal offset. int isARM64FrameOffsetLegal(const MachineInstr &MI, int &Offset, - bool *OutUseUnscaledOp = NULL, - unsigned *OutUnscaledOp = NULL, - int *EmittableOffset = NULL); + bool *OutUseUnscaledOp = nullptr, + unsigned *OutUnscaledOp = nullptr, + int *EmittableOffset = nullptr); static inline bool isUncondBranchOpcode(int Opc) { return Opc == ARM64::B; } diff --git a/lib/Target/ARM64/ARM64RegisterInfo.h b/lib/Target/ARM64/ARM64RegisterInfo.h index 290c484c2c..5743e35cfe 100644 --- a/lib/Target/ARM64/ARM64RegisterInfo.h +++ b/lib/Target/ARM64/ARM64RegisterInfo.h @@ -37,7 +37,7 @@ public: /// Code Generation virtual methods... const MCPhysReg * - getCalleeSavedRegs(const MachineFunction *MF = 0) const override; + getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; const uint32_t *getCallPreservedMask(CallingConv::ID) const override; unsigned getCSRFirstUseCost() const { @@ -82,7 +82,7 @@ public: int64_t Offset) const override; void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, - RegScavenger *RS = NULL) const override; + RegScavenger *RS = nullptr) const override; bool cannotEliminateFrame(const MachineFunction &MF) const; bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override; diff --git a/lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h b/lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h index 553ddaed1a..00fe3ef616 100644 --- a/lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h +++ b/lib/Target/ARM64/MCTargetDesc/ARM64AddressingModes.h @@ -48,7 +48,7 @@ static inline const char *getShiftName(ARM64_AM::ShiftType ST) { case ARM64_AM::ROR: return "ror"; case ARM64_AM::MSL: return "msl"; } - return 0; + return nullptr; } /// getShiftType - Extract the shift type. @@ -104,7 +104,7 @@ static inline const char *getExtendName(ARM64_AM::ExtendType ET) { case ARM64_AM::SXTW: return "sxtw"; case ARM64_AM::SXTX: return "sxtx"; } - return 0; + return nullptr; } /// getArithShiftValue - get the arithmetic shift value. |