diff options
Diffstat (limited to 'lib')
29 files changed, 31 insertions, 31 deletions
diff --git a/lib/Analysis/DataStructure/DataStructure.cpp b/lib/Analysis/DataStructure/DataStructure.cpp index f6fca1fa96..4e326545cc 100644 --- a/lib/Analysis/DataStructure/DataStructure.cpp +++ b/lib/Analysis/DataStructure/DataStructure.cpp @@ -43,7 +43,7 @@ namespace { DSAFieldLimit("dsa-field-limit", cl::Hidden, cl::desc("Number of fields to track before collapsing a node"), cl::init(256)); -}; +} #if 0 #define TIME_REGION(VARNAME, DESC) \ diff --git a/lib/Analysis/IPA/Andersens.cpp b/lib/Analysis/IPA/Andersens.cpp index 877cf2ebd9..11886936c8 100644 --- a/lib/Analysis/IPA/Andersens.cpp +++ b/lib/Analysis/IPA/Andersens.cpp @@ -192,7 +192,7 @@ namespace { enum { UniversalSet = 0, NullPtr = 1, - NullObject = 2, + NullObject = 2 }; public: diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index 8d51f7f938..8c6a7b5fc7 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -59,7 +59,7 @@ namespace { EnableJoining("join-liveintervals", cl::desc("Join compatible live intervals"), cl::init(true)); -}; +} void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const { diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 3fbfbf927a..979305fa41 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -65,7 +65,7 @@ class SelectionDAGLegalize { enum LegalizeAction { Legal, // The target natively supports this operation. Promote, // This operation should be executed in a larger type. - Expand, // Try to expand this to other ops, otherwise use a libcall. + Expand // Try to expand this to other ops, otherwise use a libcall. }; /// ValueTypeActions - This is a bitvector that contains two bits for each diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 4bd20479ff..9e98a976f0 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -60,7 +60,7 @@ namespace { RegisterPass<TwoAddressInstructionPass> X("twoaddressinstruction", "Two-Address instruction pass"); -}; +} const PassInfo *llvm::TwoAddressInstructionPassID = X.getPassInfo(); diff --git a/lib/Support/Compressor.cpp b/lib/Support/Compressor.cpp index 1233cf4f0a..99bfd676c0 100644 --- a/lib/Support/Compressor.cpp +++ b/lib/Support/Compressor.cpp @@ -23,7 +23,7 @@ using namespace llvm; enum CompressionTypes { COMP_TYPE_NONE = '0', - COMP_TYPE_BZIP2 = '2', + COMP_TYPE_BZIP2 = '2' }; static int getdata(char*& buffer, size_t &size, diff --git a/lib/Support/IsInf.cpp b/lib/Support/IsInf.cpp index 5160110bc2..39c11cd7a6 100644 --- a/lib/Support/IsInf.cpp +++ b/lib/Support/IsInf.cpp @@ -42,4 +42,4 @@ namespace llvm { int IsInf (float f) { return isinf (f); } int IsInf (double d) { return isinf (d); } -}; // end namespace llvm; +} // end namespace llvm; diff --git a/lib/Support/IsNAN.cpp b/lib/Support/IsNAN.cpp index 3300b7b47f..2ed2b284c7 100644 --- a/lib/Support/IsNAN.cpp +++ b/lib/Support/IsNAN.cpp @@ -31,4 +31,4 @@ namespace llvm { int IsNAN (float f) { return isnan (f); } int IsNAN (double d) { return isnan (d); } -}; // end namespace llvm; +} // end namespace llvm; diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 0a48978131..7cf7dd37a4 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -31,7 +31,7 @@ using namespace llvm; namespace ARMISD { enum { FIRST_NUMBER = ISD::BUILTIN_OP_END+ARM::INSTRUCTION_LIST_END, - RET_FLAG, + RET_FLAG }; } diff --git a/lib/Target/Alpha/AlphaISelLowering.h b/lib/Target/Alpha/AlphaISelLowering.h index 569fa74a8c..d6886fcc69 100644 --- a/lib/Target/Alpha/AlphaISelLowering.h +++ b/lib/Target/Alpha/AlphaISelLowering.h @@ -42,7 +42,7 @@ namespace llvm { CALL, /// DIVCALL - used for special library calls for div and rem - DivCall, + DivCall }; } diff --git a/lib/Target/Alpha/AlphaRelocations.h b/lib/Target/Alpha/AlphaRelocations.h index 59b9765085..c532f21f16 100644 --- a/lib/Target/Alpha/AlphaRelocations.h +++ b/lib/Target/Alpha/AlphaRelocations.h @@ -23,7 +23,7 @@ namespace llvm { reloc_gprellow, reloc_gprelhigh, reloc_gpdist, - reloc_bsr, + reloc_bsr }; } } diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 1e6c1e5c78..850b4127ac 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1748,7 +1748,7 @@ static SDOperand GeneratePerfectShuffle(unsigned PFEntry, SDOperand LHS, OP_VSPLTISW3, OP_VSLDOI4, OP_VSLDOI8, - OP_VSLDOI12, + OP_VSLDOI12 }; if (OpNum == OP_COPY) { diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h index 857d42b71b..25551fb6c2 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.h +++ b/lib/Target/PowerPC/PPCInstrInfo.h @@ -44,7 +44,7 @@ enum { /// PPC970_Mask/Shift - This is a bitmask that selects the pipeline type that /// an instruction is issued to. PPC970_Shift = 3, - PPC970_Mask = 0x07 << PPC970_Shift, + PPC970_Mask = 0x07 << PPC970_Shift }; enum PPC970_Unit { /// These are the various PPC970 execution unit pipelines. Each instruction @@ -56,7 +56,7 @@ enum PPC970_Unit { PPC970_CRU = 4 << PPC970_Shift, // Control Register Unit PPC970_VALU = 5 << PPC970_Shift, // Vector ALU PPC970_VPERM = 6 << PPC970_Shift, // Vector Permute Unit - PPC970_BRU = 7 << PPC970_Shift, // Branch Unit + PPC970_BRU = 7 << PPC970_Shift // Branch Unit }; } diff --git a/lib/Target/PowerPC/PPCJITInfo.cpp b/lib/Target/PowerPC/PPCJITInfo.cpp index a6d630efa2..6ee10d78b6 100644 --- a/lib/Target/PowerPC/PPCJITInfo.cpp +++ b/lib/Target/PowerPC/PPCJITInfo.cpp @@ -165,7 +165,7 @@ PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) { void *PPCJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) { // If this is just a call to an external function, emit a branch instead of a // call. The code is the same except for one bit of the last instruction. - if (Fn != PPC32CompilationCallback) { + if (Fn != (void*)PPC32CompilationCallback) { MCE.startFunctionStub(4*4); void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue(); MCE.emitWordBE(0); diff --git a/lib/Target/PowerPC/PPCRelocations.h b/lib/Target/PowerPC/PPCRelocations.h index 77c351980c..20d747b06d 100644 --- a/lib/Target/PowerPC/PPCRelocations.h +++ b/lib/Target/PowerPC/PPCRelocations.h @@ -50,7 +50,7 @@ namespace llvm { // relocated to point to a POINTER to the indicated global. The low-16 // bits of the instruction are rewritten with the low 16-bits of the // address of the pointer. - reloc_absolute_ptr_low, + reloc_absolute_ptr_low }; } } diff --git a/lib/Target/Sparc/Sparc.h b/lib/Target/Sparc/Sparc.h index 084bfe3987..c2ae18d9c4 100644 --- a/lib/Target/Sparc/Sparc.h +++ b/lib/Target/Sparc/Sparc.h @@ -75,7 +75,7 @@ namespace llvm { FCC_UGE = 12+16, // Unordered or Greater or Equal FCC_LE = 13+16, // Less or Equal FCC_ULE = 14+16, // Unordered or Less or Equal - FCC_O = 15+16, // Ordered + FCC_O = 15+16 // Ordered }; } diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp index 123b86aa29..25f6e234a2 100644 --- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp +++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp @@ -48,7 +48,7 @@ namespace SPISD { ITOF, // Int to FP within a FP register. CALL, // A call instruction. - RET_FLAG, // Return with a flag operand. + RET_FLAG // Return with a flag operand. }; } diff --git a/lib/Target/Sparc/SparcInstrInfo.h b/lib/Target/Sparc/SparcInstrInfo.h index 3dd8b8e8b3..166793e2e0 100644 --- a/lib/Target/Sparc/SparcInstrInfo.h +++ b/lib/Target/Sparc/SparcInstrInfo.h @@ -29,7 +29,7 @@ namespace SPII { Store = (1<<2), DelaySlot = (1<<3) }; -}; +} class SparcInstrInfo : public TargetInstrInfo { const SparcRegisterInfo RI; diff --git a/lib/Target/Sparc/SparcSubtarget.cpp b/lib/Target/Sparc/SparcSubtarget.cpp index beda79d49b..9940fcf3b1 100644 --- a/lib/Target/Sparc/SparcSubtarget.cpp +++ b/lib/Target/Sparc/SparcSubtarget.cpp @@ -40,4 +40,4 @@ SparcSubtarget::SparcSubtarget(const Module &M, const std::string &FS) { // Unless explicitly enabled, disable the V9 instructions. if (!EnableV9) IsV9 = false; -}; +} diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index bf70d12a6b..c9e92fa854 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -28,7 +28,7 @@ namespace llvm { bool UnsafeFPMath; bool FiniteOnlyFPMathOption; Reloc::Model RelocationModel; -}; +} namespace { cl::opt<bool, true> PrintCode("print-machineinstrs", cl::desc("Print generated machine code"), @@ -70,7 +70,7 @@ namespace { clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic", "Relocatable external references, non-relocatable code"), clEnumValEnd)); -}; +} //--------------------------------------------------------------------------- // TargetMachine Class diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 50c42ec040..b53748ab75 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -47,7 +47,7 @@ namespace { struct X86ISelAddressMode { enum { RegBase, - FrameIndexBase, + FrameIndexBase } BaseType; struct { // This is really a union, discriminated by BaseType! diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index 9269daf9ab..38aa227c95 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -156,7 +156,7 @@ namespace llvm { /// PINSRW - Insert the lower 16-bits of a 32-bit value to a vector, /// corresponds to X86::PINSRW. - PINSRW, + PINSRW }; // X86 specific condition code. These correspond to X86_*_COND in diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h index f3e1c28e4d..c0fa58debf 100644 --- a/lib/Target/X86/X86InstrBuilder.h +++ b/lib/Target/X86/X86InstrBuilder.h @@ -35,7 +35,7 @@ namespace llvm { struct X86AddressMode { enum { RegBase, - FrameIndexBase, + FrameIndexBase } BaseType; union { diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index d6dfae14e6..b49c351d68 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -162,7 +162,7 @@ namespace X86II { SpecialFP = 7 << FPTypeShift, OpcodeShift = 16, - OpcodeMask = 0xFF << OpcodeShift, + OpcodeMask = 0xFF << OpcodeShift // Bits 25 -> 31 are unused }; } diff --git a/lib/Target/X86/X86JITInfo.cpp b/lib/Target/X86/X86JITInfo.cpp index 3d1222128a..6f83651c18 100644 --- a/lib/Target/X86/X86JITInfo.cpp +++ b/lib/Target/X86/X86JITInfo.cpp @@ -167,7 +167,7 @@ X86JITInfo::getLazyResolverFunction(JITCompilerFn F) { } void *X86JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) { - if (Fn != X86CompilationCallback) { + if (Fn != (void*)X86CompilationCallback) { MCE.startFunctionStub(5); MCE.emitByte(0xE9); MCE.emitWordLE((intptr_t)Fn-MCE.getCurrentPCValue()-4); diff --git a/lib/Target/X86/X86Relocations.h b/lib/Target/X86/X86Relocations.h index 7a5f1a6884..bc1efabc7a 100644 --- a/lib/Target/X86/X86Relocations.h +++ b/lib/Target/X86/X86Relocations.h @@ -25,7 +25,7 @@ namespace llvm { // reloc_absolute_word - Absolute relocation, just add the relocated value // to the value already in memory. - reloc_absolute_word = 1, + reloc_absolute_word = 1 }; } } diff --git a/lib/Transforms/Instrumentation/RSProfiling.cpp b/lib/Transforms/Instrumentation/RSProfiling.cpp index 5918d7ee99..31c01ee886 100644 --- a/lib/Transforms/Instrumentation/RSProfiling.cpp +++ b/lib/Transforms/Instrumentation/RSProfiling.cpp @@ -162,7 +162,7 @@ namespace { RegisterOpt<ProfilerRS> X("insert-rs-profiling-framework", "Insert random sampling instrumentation framework"); -}; +} //Local utilities static void ReplacePhiPred(BasicBlock* btarget, diff --git a/lib/Transforms/Instrumentation/RSProfiling.h b/lib/Transforms/Instrumentation/RSProfiling.h index 304ce08f7b..e07db00452 100644 --- a/lib/Transforms/Instrumentation/RSProfiling.h +++ b/lib/Transforms/Instrumentation/RSProfiling.h @@ -26,4 +26,4 @@ namespace llvm { void IncrementCounterInBlock(BasicBlock *BB, unsigned CounterNum, GlobalValue *CounterArray); }; -}; +} diff --git a/lib/VMCore/Constants.cpp b/lib/VMCore/Constants.cpp index 22a14fb14e..d6e524e54e 100644 --- a/lib/VMCore/Constants.cpp +++ b/lib/VMCore/Constants.cpp @@ -529,7 +529,7 @@ bool ConstantFP::isValueValidForType(const Type *Ty, double Val) { case Type::DoubleTyID: return true; // This is the largest type... } -}; +} //===----------------------------------------------------------------------===// // Factory Function Implementation |