diff options
Diffstat (limited to 'test/Bitcode')
-rw-r--r-- | test/Bitcode/attributes.ll | 42 | ||||
-rw-r--r-- | test/Bitcode/ptest-new.ll | 9 | ||||
-rw-r--r-- | test/Bitcode/ptest-old.ll | 9 |
3 files changed, 33 insertions, 27 deletions
diff --git a/test/Bitcode/attributes.ll b/test/Bitcode/attributes.ll index 76fde786a4..764dc3f6ea 100644 --- a/test/Bitcode/attributes.ll +++ b/test/Bitcode/attributes.ll @@ -14,7 +14,7 @@ define void @f2(i8 signext) } define void @f3() noreturn -; CHECK: define void @f3() noreturn +; CHECK: define void @f3() #0 { ret void; } @@ -32,7 +32,7 @@ define void @f5(i8* sret) } define void @f6() nounwind -; CHECK: define void @f6() nounwind +; CHECK: define void @f6() #1 { ret void; } @@ -56,43 +56,43 @@ define void @f9(i8* nest) } define void @f10() readnone -; CHECK: define void @f10() readnone +; CHECK: define void @f10() #2 { ret void; } define void @f11() readonly -; CHECK: define void @f11() readonly +; CHECK: define void @f11() #3 { ret void; } define void @f12() noinline -; CHECK: define void @f12() noinline +; CHECK: define void @f12() #4 { ret void; } define void @f13() alwaysinline -; CHECK: define void @f13() alwaysinline +; CHECK: define void @f13() #5 { ret void; } define void @f14() optsize -; CHECK: define void @f14() optsize +; CHECK: define void @f14() #6 { ret void; } define void @f15() ssp -; CHECK: define void @f15() ssp +; CHECK: define void @f15() #7 { ret void; } define void @f16() sspreq -; CHECK: define void @f16() sspreq +; CHECK: define void @f16() #8 { ret void; } @@ -110,71 +110,71 @@ define void @f18(i8* nocapture) } define void @f19() noredzone -; CHECK: define void @f19() noredzone +; CHECK: define void @f19() #9 { ret void; } define void @f20() noimplicitfloat -; CHECK: define void @f20() noimplicitfloat +; CHECK: define void @f20() #10 { ret void; } define void @f21() naked -; CHECK: define void @f21() naked +; CHECK: define void @f21() #11 { ret void; } define void @f22() inlinehint -; CHECK: define void @f22() inlinehint +; CHECK: define void @f22() #12 { ret void; } define void @f23() alignstack(4) -; CHECK: define void @f23() alignstack(4) +; CHECK: define void @f23() #13 { ret void; } define void @f24() returns_twice -; CHECK: define void @f24() returns_twice +; CHECK: define void @f24() #14 { ret void; } define void @f25() uwtable -; CHECK: define void @f25() uwtable +; CHECK: define void @f25() #15 { ret void; } define void @f26() nonlazybind -; CHECK: define void @f26() nonlazybind +; CHECK: define void @f26() #16 { ret void; } define void @f27() address_safety -; CHECK: define void @f27() address_safety +; CHECK: define void @f27() #17 { ret void; } define void @f28() thread_safety -; CHECK: define void @f28() thread_safety +; CHECK: define void @f28() #18 { ret void; } define void @f29() uninitialized_checks -; CHECK: define void @f29() uninitialized_checks +; CHECK: define void @f29() #19 { ret void; } define void @f30() "cpu"="cortex-a8" -; CHECK: define void @f30() "cpu"="cortex-a8" +; CHECK: define void @f30() #20 { ret void; } diff --git a/test/Bitcode/ptest-new.ll b/test/Bitcode/ptest-new.ll index 276fb7ab6a..735cc9c1cc 100644 --- a/test/Bitcode/ptest-new.ll +++ b/test/Bitcode/ptest-new.ll @@ -13,10 +13,13 @@ entry: ret i32 %add2 } -; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone -; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone -; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone +; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) #1 +; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) #1 +; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) #1 declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone + +; CHECK: attributes #0 = { nounwind } +; CHECK: attributes #1 = { nounwind readnone } diff --git a/test/Bitcode/ptest-old.ll b/test/Bitcode/ptest-old.ll index fc6ed8ef7b..fbe962fae5 100644 --- a/test/Bitcode/ptest-old.ll +++ b/test/Bitcode/ptest-old.ll @@ -13,10 +13,13 @@ entry: ret i32 %add2 } -; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone -; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone -; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone +; CHECK: declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) #1 +; CHECK: declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) #1 +; CHECK: declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) #1 declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone + +; CHECK: attributes #0 = { nounwind } +; CHECK: attributes #1 = { nounwind readnone } |