diff options
Diffstat (limited to 'test/CodeGen/ARM/fast-isel-intrinsic.ll')
-rw-r--r-- | test/CodeGen/ARM/fast-isel-intrinsic.ll | 72 |
1 files changed, 40 insertions, 32 deletions
diff --git a/test/CodeGen/ARM/fast-isel-intrinsic.ll b/test/CodeGen/ARM/fast-isel-intrinsic.ll index 48105dd389..bc9769a537 100644 --- a/test/CodeGen/ARM/fast-isel-intrinsic.ll +++ b/test/CodeGen/ARM/fast-isel-intrinsic.ll @@ -3,33 +3,37 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG +; Note that some of these tests assume that relocations are either +; movw/movt or constant pool loads. Different platforms will select +; different approaches. + @message1 = global [60 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1 @temp = common global [60 x i8] zeroinitializer, align 1 define void @t1() nounwind ssp { ; ARM: t1 -; ARM: movw r0, :lower16:_message1 -; ARM: movt r0, :upper16:_message1 +; ARM: {{(movw r0, :lower16:_?message1)|(ldr r0, .LCPI)}} +; ARM: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}} ; ARM: add r0, r0, #5 ; ARM: movw r1, #64 ; ARM: movw r2, #10 ; ARM: uxtb r1, r1 -; ARM: bl _memset +; ARM: bl {{_?}}memset ; ARM-LONG: t1 ; ARM-LONG: movw r3, :lower16:L_memset$non_lazy_ptr ; ARM-LONG: movt r3, :upper16:L_memset$non_lazy_ptr ; ARM-LONG: ldr r3, [r3] ; ARM-LONG: blx r3 ; THUMB: t1 -; THUMB: movw r0, :lower16:_message1 -; THUMB: movt r0, :upper16:_message1 +; THUMB: {{(movw r0, :lower16:_?message1)|(ldr.n r0, .LCPI)}} +; THUMB: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}} ; THUMB: adds r0, #5 ; THUMB: movs r1, #64 ; THUMB: movt r1, #0 ; THUMB: movs r2, #10 ; THUMB: movt r2, #0 ; THUMB: uxtb r1, r1 -; THUMB: bl _memset +; THUMB: bl {{_?}}memset ; THUMB-LONG: t1 ; THUMB-LONG: movw r3, :lower16:L_memset$non_lazy_ptr ; THUMB-LONG: movt r3, :upper16:L_memset$non_lazy_ptr @@ -43,31 +47,33 @@ declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind define void @t2() nounwind ssp { ; ARM: t2 -; ARM: movw r0, :lower16:L_temp$non_lazy_ptr -; ARM: movt r0, :upper16:L_temp$non_lazy_ptr +; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}} +; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; ARM: ldr r0, [r0] ; ARM: add r1, r0, #4 ; ARM: add r0, r0, #16 ; ARM: movw r2, #17 -; ARM: str r0, [sp] @ 4-byte Spill +; ARM: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill ; ARM: mov r0, r1 -; ARM: ldr r1, [sp] @ 4-byte Reload -; ARM: bl _memcpy +; ARM: ldr r1, [sp[[SLOT]]] @ 4-byte Reload +; ARM: bl {{_?}}memcpy ; ARM-LONG: t2 ; ARM-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr ; ARM-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr ; ARM-LONG: ldr r3, [r3] ; ARM-LONG: blx r3 ; THUMB: t2 -; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr -; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr +; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}} +; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; THUMB: ldr r0, [r0] ; THUMB: adds r1, r0, #4 ; THUMB: adds r0, #16 ; THUMB: movs r2, #17 ; THUMB: movt r2, #0 +; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill ; THUMB: mov r0, r1 -; THUMB: bl _memcpy +; THUMB: ldr r1, [sp[[SLOT]]] @ 4-byte Reload +; THUMB: bl {{_?}}memcpy ; THUMB-LONG: t2 ; THUMB-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr ; THUMB-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr @@ -81,29 +87,31 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, define void @t3() nounwind ssp { ; ARM: t3 -; ARM: movw r0, :lower16:L_temp$non_lazy_ptr -; ARM: movt r0, :upper16:L_temp$non_lazy_ptr +; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}} +; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; ARM: ldr r0, [r0] ; ARM: add r1, r0, #4 ; ARM: add r0, r0, #16 ; ARM: movw r2, #10 ; ARM: mov r0, r1 -; ARM: bl _memmove +; ARM: bl {{_?}}memmove ; ARM-LONG: t3 ; ARM-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr ; ARM-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr ; ARM-LONG: ldr r3, [r3] ; ARM-LONG: blx r3 ; THUMB: t3 -; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr -; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr +; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}} +; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; THUMB: ldr r0, [r0] ; THUMB: adds r1, r0, #4 ; THUMB: adds r0, #16 ; THUMB: movs r2, #10 ; THUMB: movt r2, #0 +; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill ; THUMB: mov r0, r1 -; THUMB: bl _memmove +; THUMB: ldr r1, [sp[[SLOT]]] @ 4-byte Reload +; THUMB: bl {{_?}}memmove ; THUMB-LONG: t3 ; THUMB-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr ; THUMB-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr @@ -115,8 +123,8 @@ define void @t3() nounwind ssp { define void @t4() nounwind ssp { ; ARM: t4 -; ARM: movw r0, :lower16:L_temp$non_lazy_ptr -; ARM: movt r0, :upper16:L_temp$non_lazy_ptr +; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}} +; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; ARM: ldr r0, [r0] ; ARM: ldr r1, [r0, #16] ; ARM: str r1, [r0, #4] @@ -126,8 +134,8 @@ define void @t4() nounwind ssp { ; ARM: strh r1, [r0, #12] ; ARM: bx lr ; THUMB: t4 -; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr -; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr +; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}} +; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; THUMB: ldr r0, [r0] ; THUMB: ldr r1, [r0, #16] ; THUMB: str r1, [r0, #4] @@ -144,8 +152,8 @@ declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, define void @t5() nounwind ssp { ; ARM: t5 -; ARM: movw r0, :lower16:L_temp$non_lazy_ptr -; ARM: movt r0, :upper16:L_temp$non_lazy_ptr +; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}} +; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; ARM: ldr r0, [r0] ; ARM: ldrh r1, [r0, #16] ; ARM: strh r1, [r0, #4] @@ -159,8 +167,8 @@ define void @t5() nounwind ssp { ; ARM: strh r1, [r0, #12] ; ARM: bx lr ; THUMB: t5 -; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr -; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr +; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}} +; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; THUMB: ldr r0, [r0] ; THUMB: ldrh r1, [r0, #16] ; THUMB: strh r1, [r0, #4] @@ -179,8 +187,8 @@ define void @t5() nounwind ssp { define void @t6() nounwind ssp { ; ARM: t6 -; ARM: movw r0, :lower16:L_temp$non_lazy_ptr -; ARM: movt r0, :upper16:L_temp$non_lazy_ptr +; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}} +; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; ARM: ldr r0, [r0] ; ARM: ldrb r1, [r0, #16] ; ARM: strb r1, [r0, #4] @@ -204,8 +212,8 @@ define void @t6() nounwind ssp { ; ARM: strb r1, [r0, #13] ; ARM: bx lr ; THUMB: t6 -; THUMB: movw r0, :lower16:L_temp$non_lazy_ptr -; THUMB: movt r0, :upper16:L_temp$non_lazy_ptr +; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}} +; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}} ; THUMB: ldr r0, [r0] ; THUMB: ldrb r1, [r0, #16] ; THUMB: strb r1, [r0, #4] |