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-rw-r--r--test/CodeGen/X86/bt.ll7
1 files changed, 6 insertions, 1 deletions
diff --git a/test/CodeGen/X86/bt.ll b/test/CodeGen/X86/bt.ll
index b63a3f8ecf..86254d3295 100644
--- a/test/CodeGen/X86/bt.ll
+++ b/test/CodeGen/X86/bt.ll
@@ -1,7 +1,12 @@
; RUN: llvm-as < %s | llc | grep btl
-; RUN: llvm-as < %s | llc -mcpu=pentium4 | grep btl | grep esp
+; RUN: llvm-as < %s | llc -mcpu=pentium4 | grep btl | not grep esp
; RUN: llvm-as < %s | llc -mcpu=penryn | grep btl | not grep esp
; PR3253
+
+; The register+memory form of the BT instruction should be usable on
+; pentium4, however it is currently disabled due to the register+memory
+; form having different semantics than the register+register form.
+
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"