diff options
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Mips/msa/frameindex.ll | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/msa/frameindex.ll b/test/CodeGen/Mips/msa/frameindex.ll index f8fa686301..07e67bf042 100644 --- a/test/CodeGen/Mips/msa/frameindex.ll +++ b/test/CodeGen/Mips/msa/frameindex.ll @@ -97,6 +97,26 @@ define void @loadstore_v8i16_near() nounwind { ; MIPS32-AE: .size loadstore_v8i16_near } +define void @loadstore_v8i16_unaligned() nounwind { + ; MIPS32-AE: loadstore_v8i16_unaligned: + + %1 = alloca [2 x <8 x i16>] + %2 = bitcast [2 x <8 x i16>]* %1 to i8* + %3 = getelementptr i8* %2, i32 1 + %4 = bitcast i8* %3 to [2 x <8 x i16>]* + %5 = getelementptr [2 x <8 x i16>]* %4, i32 0, i32 0 + + %6 = load volatile <8 x i16>* %5 + ; MIPS32-AE: addiu [[BASE:\$[0-9]+]], $sp, 1 + ; MIPS32-AE: ld.h [[R1:\$w[0-9]+]], 0([[BASE]]) + store volatile <8 x i16> %6, <8 x i16>* %5 + ; MIPS32-AE: addiu [[BASE:\$[0-9]+]], $sp, 1 + ; MIPS32-AE: st.h [[R1]], 0([[BASE]]) + + ret void + ; MIPS32-AE: .size loadstore_v8i16_unaligned +} + define void @loadstore_v8i16_just_under_simm10() nounwind { ; MIPS32-AE: loadstore_v8i16_just_under_simm10: @@ -180,6 +200,26 @@ define void @loadstore_v4i32_near() nounwind { ; MIPS32-AE: .size loadstore_v4i32_near } +define void @loadstore_v4i32_unaligned() nounwind { + ; MIPS32-AE: loadstore_v4i32_unaligned: + + %1 = alloca [2 x <4 x i32>] + %2 = bitcast [2 x <4 x i32>]* %1 to i8* + %3 = getelementptr i8* %2, i32 1 + %4 = bitcast i8* %3 to [2 x <4 x i32>]* + %5 = getelementptr [2 x <4 x i32>]* %4, i32 0, i32 0 + + %6 = load volatile <4 x i32>* %5 + ; MIPS32-AE: addiu [[BASE:\$[0-9]+]], $sp, 1 + ; MIPS32-AE: ld.w [[R1:\$w[0-9]+]], 0([[BASE]]) + store volatile <4 x i32> %6, <4 x i32>* %5 + ; MIPS32-AE: addiu [[BASE:\$[0-9]+]], $sp, 1 + ; MIPS32-AE: st.w [[R1]], 0([[BASE]]) + + ret void + ; MIPS32-AE: .size loadstore_v4i32_unaligned +} + define void @loadstore_v4i32_just_under_simm10() nounwind { ; MIPS32-AE: loadstore_v4i32_just_under_simm10: @@ -263,6 +303,26 @@ define void @loadstore_v2i64_near() nounwind { ; MIPS32-AE: .size loadstore_v2i64_near } +define void @loadstore_v2i64_unaligned() nounwind { + ; MIPS32-AE: loadstore_v2i64_unaligned: + + %1 = alloca [2 x <2 x i64>] + %2 = bitcast [2 x <2 x i64>]* %1 to i8* + %3 = getelementptr i8* %2, i32 1 + %4 = bitcast i8* %3 to [2 x <2 x i64>]* + %5 = getelementptr [2 x <2 x i64>]* %4, i32 0, i32 0 + + %6 = load volatile <2 x i64>* %5 + ; MIPS32-AE: addiu [[BASE:\$[0-9]+]], $sp, 1 + ; MIPS32-AE: ld.d [[R1:\$w[0-9]+]], 0([[BASE]]) + store volatile <2 x i64> %6, <2 x i64>* %5 + ; MIPS32-AE: addiu [[BASE:\$[0-9]+]], $sp, 1 + ; MIPS32-AE: st.d [[R1]], 0([[BASE]]) + + ret void + ; MIPS32-AE: .size loadstore_v2i64_unaligned +} + define void @loadstore_v2i64_just_under_simm10() nounwind { ; MIPS32-AE: loadstore_v2i64_just_under_simm10: |