diff options
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/PowerPC/rlwimi-and.ll | 9 | ||||
-rw-r--r-- | test/CodeGen/SystemZ/shift-10.ll | 12 |
2 files changed, 16 insertions, 5 deletions
diff --git a/test/CodeGen/PowerPC/rlwimi-and.ll b/test/CodeGen/PowerPC/rlwimi-and.ll index e20a13fec0..7963249ddf 100644 --- a/test/CodeGen/PowerPC/rlwimi-and.ll +++ b/test/CodeGen/PowerPC/rlwimi-and.ll @@ -28,12 +28,11 @@ codeRepl17: ; preds = %codeRepl4 store i16 %rvml38.sroa.0.0.insert.insert, i16* undef, align 2 unreachable +; FIXME: the SLWI could be folded into the RLWIMI to give a rotate of 8. ; CHECK: @test -; CHECK-DAG: slwi [[R1:[0-9]+]], -; CHECK-DAG: rlwinm [[R2:[0-9]+]], -; CHECK-DAG: srawi [[R3:[0-9]+]], [[R1]] -; CHECK-DAG: rlwinm [[R4:[0-9]+]], [[R3]], 0, 23, 23 -; CHECK: rlwimi [[R4]], [[R2]], 0, +; CHECK-DAG: slwi [[R1:[0-9]+]], {{[0-9]+}}, 31 +; CHECK-DAG: rlwinm [[R2:[0-9]+]], {{[0-9]+}}, 0, 31, 31 +; CHECK: rlwimi [[R2]], [[R1]], 9, 23, 23 codeRepl29: ; preds = %codeRepl1 unreachable diff --git a/test/CodeGen/SystemZ/shift-10.ll b/test/CodeGen/SystemZ/shift-10.ll index 3fd965745e..46ed2180df 100644 --- a/test/CodeGen/SystemZ/shift-10.ll +++ b/test/CodeGen/SystemZ/shift-10.ll @@ -64,3 +64,15 @@ define i64 @f5(i32 %a) { %or = or i64 %shl, 7 ret i64 %or } + +; Test that SRA gets replaced with SRL if the sign bit is the only one +; that matters. +define i64 @f6(i64 %a) { +; CHECK-LABEL: f6: +; CHECK: risbg %r2, %r2, 55, 183, 19 +; CHECK: br %r14 + %shl = shl i64 %a, 10 + %shr = ashr i64 %shl, 60 + %and = and i64 %shr, 256 + ret i64 %and +} |