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| * Merging r181576:Bill Wendling2013-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181576 | tstellar | 2013-05-09 19:09:24 -0700 (Thu, 09 May 2013) | 10 lines R600: Expand vselect for v4i32 and v2i32 v2: Add vselect v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181950 91177308-0d34-0410-b5e6-96231b3b80d8
| * Merging r181792:Bill Wendling2013-05-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181792 | tstellar | 2013-05-14 07:42:56 -0700 (Tue, 14 May 2013) | 8 lines R600/SI: Add processor type for Hainan asic Patch by: Alex Deucher Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181949 91177308-0d34-0410-b5e6-96231b3b80d8
| * Merging r181842:Bill Wendling2013-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181842 | arnolds | 2013-05-14 15:33:24 -0700 (Tue, 14 May 2013) | 14 lines ARM ISel: Don't create illegal types during LowerMUL The transformation happening here is that we want to turn a "mul(ext(X), ext(X))" into a "vmull(X, X)", stripping off the extension. We have to make sure that X still has a valid vector type - possibly recreate an extension to a smaller type. In case of a extload of a memory type smaller than 64 bit we used create a ext(load()). The problem with doing this - instead of recreating an extload - is that an illegal type is exposed. This patch fixes this by creating extloads instead of ext(load()) sequences. Fixes PR15970. radar://13871383 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181946 91177308-0d34-0410-b5e6-96231b3b80d8
* | Merge branch 'release_33' of git://github.com/llvm-mirror/llvm into ↵Abdoulaye Walsimou Gaye2013-05-15
|\| | | | | | | embtk-support-release-3.3
| * Merging r181524:Bill Wendling2013-05-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181524 | rafael | 2013-05-09 10:22:59 -0700 (Thu, 09 May 2013) | 4 lines Don't replace an alias in llvm.used with its target. When we replace an internal alias with its target, be careful not to replace the entry in llvm.used (and llvm.compiler_used). ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181909 91177308-0d34-0410-b5e6-96231b3b80d8
| * Merging r181450:Bill Wendling2013-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181450 | uweigand | 2013-05-08 10:50:07 -0700 (Wed, 08 May 2013) | 16 lines [PowerPC] Fix regression in generating @ha/@l relocs The patch I committed as revision 167864 introduced a regression that causes LLVM to no longer generate appropriate relocs for @ha/@l symbol references (but fail an assertion instead). This is fixed here by re-enabling support for the VK_PPC_GAS_HA16/ VK_PPC_GAS_LO16 variant kinds (and their Darwin variants) in PPCELFObjectWriter.cpp. Tested by running projects/test-suite in -m32 mode with the integrated assembler forced on. A standalone test case will be committed shortly as well. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181816 91177308-0d34-0410-b5e6-96231b3b80d8
| * Merging r181800:Bill Wendling2013-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181800 | wschmidt | 2013-05-14 09:08:32 -0700 (Tue, 14 May 2013) | 15 lines PPC32: Fix stack collision between FP and CR save areas. The changes to CR spill handling missed a case for 32-bit PowerPC. The code in PPCFrameLowering::processFunctionBeforeFrameFinalized() checks whether CR spill has occurred using a flag in the function info. This flag is only set by storeRegToStackSlot and loadRegFromStackSlot. spillCalleeSavedRegisters does not call storeRegToStackSlot, but instead produces MI directly. Thus we don't see the CR is spilled when assigning frame offsets, and the CR spill ends up colliding with some other location (generally the FP slot). This patch sets the flag in spillCalleeSavedRegisters for PPC32 so that the CR spill is properly detected and gets its own slot in the stack frame. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181815 91177308-0d34-0410-b5e6-96231b3b80d8
| * Merging r181586:Bill Wendling2013-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181586 | d0k | 2013-05-10 02:16:52 -0700 (Fri, 10 May 2013) | 3 lines InstCombine: Verify the type before transforming uitofp into select. PR15952. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181813 91177308-0d34-0410-b5e6-96231b3b80d8
* | [Embtk] autoconf: fix build error when no hash-style configuredAbdoulaye Walsimou Gaye2013-05-12
| | | | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit 0824091315296ab3da27856b76e7422348d3850d)
* | Merge branch 'release_33' of git://github.com/llvm-mirror/llvm into ↵Abdoulaye Walsimou Gaye2013-05-11
|\| | | | | | | embtk-support-release-3.3
| * Fixing MCJIT unit test on Windows.Andrew Kaylor2013-05-10
| | | | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181625 91177308-0d34-0410-b5e6-96231b3b80d8
| * Merging r181397:Bill Wendling2013-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181397 | nicholas | 2013-05-08 02:00:10 -0700 (Wed, 08 May 2013) | 3 lines Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInst by switching to a ValueMap. Patch by Andrea DiBiagio! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181619 91177308-0d34-0410-b5e6-96231b3b80d8
* | [Embtk] Give ability to not build unittests via NO_UNITTESTSAbdoulaye Walsimou Gaye2013-05-10
| | | | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit 2dde0d30145d774df263b13cbd142eddda15cc10)
* | [Embtk]: Give ability to specify default target ABI at configure timeAbdoulaye Walsimou Gaye2013-05-10
| | | | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit 6ab8513df36438aa2c16facc94f306891446e061)
* | [Embtk]: MIPS: support more possible GNU triplesAbdoulaye Walsimou Gaye2013-05-10
| | | | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit fc68c08556caddcbc5dffadcf853b27262ce77c7)
* | [Embtk] Give ability to specify default linker hash-style at configure timeAbdoulaye Walsimou Gaye2013-05-10
| | | | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit cab4a8d897c586d1f53790fefe16fca91f4d18d1)
* | [Embtk] give ability to specify default FPU to use at configure timeAbdoulaye Walsimou Gaye2013-05-10
| | | | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit 32e1613ce8f734d858831c228c36da70d783c0cd)
* | [Embtk] complete configure time default for -mcpuAbdoulaye Walsimou Gaye2013-05-10
| | | | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit b8b4ff534dc61e271ccf3a68ec6c87d9eb7da4ad)
* | [Embtk] Give ability to specify default float abi to use at configure timeAbdoulaye Walsimou Gaye2013-05-10
| | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org>
* | [Embtk] Give ability to specify default -mcpuAbdoulaye Walsimou Gaye2013-05-10
| | | | | | | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit 0f3b0d56e88a03d371d2e03ab715e44b2693c96f)
* | [Embtk]: ARM: support more possible GNU triplesAbdoulaye Walsimou Gaye2013-05-10
|/ | | | | Signed-off-by: Abdoulaye Walsimou Gaye <awg@embtoolkit.org> (cherry picked from commit 15576f4b00b24f85206e5fcfffe832a1c6cb7a75)
* Merging r181423:Bill Wendling2013-05-09
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181423 | hfinkel | 2013-05-08 05:16:14 -0700 (Wed, 08 May 2013) | 5 lines PPCInstrInfo::optimizeCompareInstr should not optimize FP compares The floating-point record forms on PPC don't set the condition register bits based on a comparison with zero (like the integer record forms do), but rather based on the exception status bits. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181507 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181286:Bill Wendling2013-05-08
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181286 | arnolds | 2013-05-06 21:37:05 -0700 (Mon, 06 May 2013) | 7 lines LoopVectorize: getConsecutiveVector must respect signed arithmetic We were passing an i32 to ConstantInt::get where an i64 was needed and we must also pass the sign if we pass negatives numbers. The start index passed to getConsecutiveVector must also be signed. Should fix PR15882. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181455 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge of r181434Richard Sandiford2013-05-08
| | | | | | | Add myself as SystemZ code owner git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181435 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge of r181431Richard Sandiford2013-05-08
| | | | | | | Add SystemZ feats to CodeGenerator.rst git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181432 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge of r181328Richard Sandiford2013-05-08
| | | | | | | Mention SystemZ in the release notes git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181427 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge of r181312Richard Sandiford2013-05-08
| | | | | | | | | | | [SystemZ] Fix InitMCCodeGenInfo call createSystemZMCCodeGenInfo was not passing the optimization level to InitMCCodeGenInfo(), so -O0 would be ignored. Fixes DebugInfo/namespace.ll after the changes in r181271. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181419 91177308-0d34-0410-b5e6-96231b3b80d8
* Update to ToT's version.Bill Wendling2013-05-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181403 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181313:Bill Wendling2013-05-08
| | | | | | | | | | | ------------------------------------------------------------------------ r181313 | mkuper | 2013-05-07 07:05:33 -0700 (Tue, 07 May 2013) | 1 line Re-enable AVX detection on x64 platforms. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181399 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn off binary comparison for 3.3 release.Bill Wendling2013-05-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181398 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181296:Bill Wendling2013-05-08
| | | | | | | | | | | ------------------------------------------------------------------------ r181296 | timurrrr | 2013-05-07 00:47:47 -0700 (Tue, 07 May 2013) | 1 line Fix the VS2010 build broken by r181271 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181379 91177308-0d34-0410-b5e6-96231b3b80d8
* Creating release_33 branchBill Wendling2013-05-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181273 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Support imported modules in lexical blocksDavid Blaikie2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181271 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcodeTom Stellard2013-05-06
| | | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181269 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Handle arbitrary destination type in SITargetLowering::adjustWritemaskTom Stellard2013-05-06
| | | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181268 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add intrinsic for texture image loadingTom Stellard2013-05-06
| | | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181267 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add pattern for uint_to_fpTom Stellard2013-05-06
| | | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181266 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add patterns for integer maxima / minimaTom Stellard2013-05-06
| | | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181265 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add pattern for AMDGPU.trunc intrinsicTom Stellard2013-05-06
| | | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181263 91177308-0d34-0410-b5e6-96231b3b80d8
* Print IR from Hexagon MI passes with -print-before/after-all.Krzysztof Parzyszek2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181255 91177308-0d34-0410-b5e6-96231b3b80d8
* Implemented public interface for modifying registered (not positional or ↵Andrew Trick2013-05-06
| | | | | | | | sink options) command line options at runtime. Patch by Dan Liew! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181254 91177308-0d34-0410-b5e6-96231b3b80d8
* Support command line option categories.Andrew Trick2013-05-06
| | | | | | Patch by Dan Liew! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181253 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup of the HexagonTargetMachine setup.Krzysztof Parzyszek2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181250 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: (X ^ signbit) + C -> X + (signbit ^ C)David Majnemer2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181249 91177308-0d34-0410-b5e6-96231b3b80d8
* Hoist boundary condition out of loop header.Eric Christopher2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181248 91177308-0d34-0410-b5e6-96231b3b80d8
* Untabify.Eric Christopher2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181247 91177308-0d34-0410-b5e6-96231b3b80d8
* Reduce attributes.Bill Wendling2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181245 91177308-0d34-0410-b5e6-96231b3b80d8
* Split Alignment out of the Section Characteristics.Rafael Espindola2013-05-06
| | | | | | | | The alignment is just a byte in the middle of Characteristics, not an independent flag. Making it an independent field in the yaml representation makes it more yamlio friendly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181243 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181235 91177308-0d34-0410-b5e6-96231b3b80d8
* Test results verified using FileCheck rather than grep | countJean-Luc Duprat2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181234 91177308-0d34-0410-b5e6-96231b3b80d8
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