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* Implement 3 AArch64 neon instructions : umov smov ins.Kevin Qin2013-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190839 91177308-0d34-0410-b5e6-96231b3b80d8
* [SelectionDAG] Teach the vector scalarizer about TRUNCATE.Quentin Colombet2013-09-17
| | | | | | | | | | | | When a truncate node defines a legal vector type but uses an illegal vector type, the legalization process was splitting the vector until <1 x vector> type, but then it was failing to scalarize the node because it did not know how to handle TRUNCATE. <rdar://problem/14989896> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190830 91177308-0d34-0410-b5e6-96231b3b80d8
* mention command line parametersAdrian Prantl2013-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190827 91177308-0d34-0410-b5e6-96231b3b80d8
* simplify expressionAdrian Prantl2013-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190826 91177308-0d34-0410-b5e6-96231b3b80d8
* Be sure we run ARM tests only when an ARM backend is present.Adrian Prantl2013-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190822 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info: Fix PR16736 and rdar://problem/14990587.Adrian Prantl2013-09-16
| | | | | | | A DBG_VALUE is register-indirect iff the first operand is a register _and_ the second operand is an immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190821 91177308-0d34-0410-b5e6-96231b3b80d8
* MemCpyOptimizer: Use max legal int size instead of pointer sizeMatt Arsenault2013-09-16
| | | | | | | | | | | | If there are no legal integers, assume 1 byte. This makes more sense than using the pointer size as a guess for the maximum GPR width. It is conceivable to want to use some 64-bit pointers on a target where 64-bit integers aren't legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190817 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Atom Silvermont (slm) testsPreston Gurd2013-09-16
| | | | | | | | | | - check that -mcpu=slm uses the call register indirect optimization - check that -mcpu=slm runs the scheduler - check that -mcpu=slm supports the movbe instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190814 91177308-0d34-0410-b5e6-96231b3b80d8
* Use reference instead of copy.Jakub Staszak2013-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190813 91177308-0d34-0410-b5e6-96231b3b80d8
* [CMake] Hack GetSVN.cmake to handle unusual terminals.Jordan Rose2013-09-16
| | | | | | | | I got a report of a hang in git's helper functions trying to figure out how to display results of "git svn info" when run inside ninja, even though the result is immediately piped to grep. This seems to avoid that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190808 91177308-0d34-0410-b5e6-96231b3b80d8
* Add testcase for r190631Krzysztof Parzyszek2013-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190807 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: fix constness of new comparison function.Tim Northover2013-09-16
| | | | | | libc++ didn't seem to like a non-const call operator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190797 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Fix PR17155 - Ignore COPY_TO_REGCLASS during emit.Bill Schmidt2013-09-16
| | | | | | | | | | Fast-isel generates a COPY_TO_REGCLASS for widening f32 to f64, which is a nop on PPC64. This is needed to keep the register class system happy, but on the fast-isel path it is not removed before emit as it is for DAG select. Ignore this op when emitting instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190795 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: give asm match classes deterministic order.Tim Northover2013-09-16
| | | | | | | | | | | | | | | TableGen was sorting the entries in some of its internal data structures by pointer. This order filtered through to the final matching table and affected the diagnostics produced on bad assembly occasionally. It also turns out STL algorithms are ridiculously easy to misuse on containers with custom order methods. (No bugs before, or now that I know of, but plenty in the middle). This should fix the sanitizer bot, which ends up with weird pointers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190793 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmMatcher: emit subtarget feature enum in deterministic order.Tim Northover2013-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190792 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't vectorize if there are outside loop users of the induction variable.Arnold Schwaighofer2013-09-16
| | | | | | | | | | | | We would have to compute the pre increment value, either by computing it on every loop iteration or by splitting the edge out of the loop and inserting a computation for it there. For now, just give up vectorizing such loops. Fixes PR17179. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190790 91177308-0d34-0410-b5e6-96231b3b80d8
* [msan] Check return value of main().Evgeniy Stepanov2013-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190782 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch implements Mips load/store instructions from/to coprocessor 2. ↵Vladimir Medic2013-09-16
| | | | | | Test cases are added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190780 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Deduplicate ConstantPoolValues.Benjamin Kramer2013-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190779 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the build for git repositories with multiple remotes.Daniel Sanders2013-09-16
| | | | | | | | | | | | | | | Summary: When a git repository had multiple remotes, ${repository} will be set to a multiline string. This causes compilation errors in SVNVersion.inc. Fix this by limiting the output of utils/GetRepositoryPath to the first remote (which is reasonably likely to be 'origin'). Reviewers: jordan_rose CC: llvm-commits, t.p.northover Differential Revision: http://llvm-reviews.chandlerc.com/D1659 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190778 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Improve extload handlingRichard Sandiford2013-09-16
| | | | | | | | | | | | | The port originally had special patterns for extload, mapping them to the same instructions as sextload. It seemed neater to have patterns that match "an extension that is allowed to be signed" and "an extension that is allowed to be unsigned". This was originally meant to be a clean-up, but it does improve the handling of promoted integers a little, as shown by args-06.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190777 91177308-0d34-0410-b5e6-96231b3b80d8
* Make F16C feature flag imply AVX rather than just checking both at the patterns.Craig Topper2013-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190775 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement function prefix data as an IR feature.Peter Collingbourne2013-09-16
| | | | | | | | | Previous discussion: http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/063909.html Differential Revision: http://llvm-reviews.chandlerc.com/D1191 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190773 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC: Don't restrict lvsl generation to after type legalizationHal Finkel2013-09-15
| | | | | | | | | | | | | | | | | | | This is a re-commit of r190764, with an extra check to make sure that we're not performing the transformation on illegal types (a small test case has been added for this as well). Original commit message: The PPC backend uses a target-specific DAG combine to turn unaligned Altivec loads into a permutation-based sequence when possible. Unfortunately, the target-specific DAG combine is not always called on all loads of interest (sometimes the routines in DAGCombine call CombineTo such that the new node and users are not added to the worklist); allowing the combine to trigger early (before type legalization) mitigates this problem. Because the autovectorizers only create legal vector types, I don't expect a lot of cases where this optimization is enabled by type legalization in practice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190771 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace some unnecessary vector copies with references.Benjamin Kramer2013-09-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190770 91177308-0d34-0410-b5e6-96231b3b80d8
* ELF: Add support for the exclude section bit for gas compat.Benjamin Kramer2013-09-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190769 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Add support for '?' flags in .section directivesDavid Majnemer2013-09-15
| | | | | | | | | | | | | | | | | | | Summary: The '?' flag uses the last section group if the last had a section group. We treat combining an explicit section group and the '?' as a hard error. This fixes PR17198. Reviewers: rafael, bkramer Reviewed By: bkramer CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D1686 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190768 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix alignment of unwind data.Kai Nacke2013-09-15
| | | | | | | | | | | | For alignment purposes, the instruction array will always have an even number of entries, with the final entry potentially unused (in which case the array will be one longer than indicated by the count of unwind codes field). Reviewed by Anton Korobeynikov, Charles Davis and Nico Rieck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190767 91177308-0d34-0410-b5e6-96231b3b80d8
* Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEHKai Nacke2013-09-15
| | | | | | | | | | | | | | | data structures. The Win64 EH data structures must be of type IMAGE_REL_AMD64_ADDR32NB instead of IMAGE_REL_AMD64_ADDR32. This is easiely achieved by adding the VK_COFF_IMGREL32 modifier to the symbol reference. Change also references to start and end of the SEH range of a function as offsets to start of the function. Reviewed by Jim Grosbach, Charles Davis and Nico Rieck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190766 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r190764: PPC: Don't restrict lvsl generation to after type legalizationHal Finkel2013-09-15
| | | | | | | | | | | | | | | | | This is causing test-suite failures. Original commit message: The PPC backend uses a target-specific DAG combine to turn unaligned Altivec loads into a permutation-based sequence when possible. Unfortunately, the target-specific DAG combine is not always called on all loads of interest (sometimes the routines in DAGCombine call CombineTo such that the new node and users are not added to the worklist); allowing the combine to trigger early (before type legalization) mitigates this problem. Because the autovectorizers only create legal vector types, I don't expect a lot of cases where this optimization is enabled by type legalization in practice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190765 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC: Don't restrict lvsl generation to after type legalizationHal Finkel2013-09-15
| | | | | | | | | | | | | The PPC backend uses a target-specific DAG combine to turn unaligned Altivec loads into a permutation-based sequence when possible. Unfortunately, the target-specific DAG combine is not always called on all loads of interest (sometimes the routines in DAGCombine call CombineTo such that the new node and users are not added to the worklist); allowing the combine to trigger early (before type legalization) mitigates this problem. Because the autovectorizers only create legal vector types, I don't expect a lot of cases where this optimization is enabled by type legalization in practice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190764 91177308-0d34-0410-b5e6-96231b3b80d8
* Prevent assert in CombinerGlobalAA with null valuesHal Finkel2013-09-15
| | | | | | | DAGCombiner::isAlias can be called with SrcValue1 or SrcValue2 null, and we can't use AA in this case (if we try, then the casting code in AA will assert). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190763 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand the mask capability for deciding which functions are mips16 and mips32Reed Kotler2013-09-15
| | | | | | | | | so it can be better used for general interoperability testing between mips32 and mips16. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190762 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused StringRef that no compiler warned about, I wonder why.Benjamin Kramer2013-09-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190759 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the remaining Intel SHA instructionsBen Langmuir2013-09-14
| | | | | | | | Also assembly/disassembly tests, and for sha256rnds2, aliases with an explicit xmm0 dependency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190754 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix spelling.Robert Wilhelm2013-09-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190750 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix spelling.Robert Wilhelm2013-09-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190749 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the long, long defunct IR block placement pass.Chandler Carruth2013-09-14
| | | | | | | | | | | | | | | | | This pass was based on the previous (essentially unused) profiling infrastructure and the assumption that by ordering the basic blocks at the IR level in a particular way, the correct layout would happen in the end. This sometimes worked, and mostly didn't. It also was a really naive implementation of the classical paper that dates from when branch predictors were primarily directional and when loop structure wasn't commonly available. It also didn't factor into the equation non-fallthrough branches and other machine level details. Anyways, for all of these reasons and more, I wrote MachineBlockPlacement, which completely supercedes this pass. It both uses modern profile information infrastructure, and actually works. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190748 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed bug when generating Load Upper Immediate microMIPS instruction.Zoran Jovanovic2013-09-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190746 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for microMIPS DIV instructions.Zoran Jovanovic2013-09-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190745 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for misc microMIPS instructions.Zoran Jovanovic2013-09-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190744 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing CHECK-LABELMatt Arsenault2013-09-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190740 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test for untested path in SimplifyCFGMatt Arsenault2013-09-14
| | | | | | This case wasn't checked with a pointer condition. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190739 91177308-0d34-0410-b5e6-96231b3b80d8
* [lit] Add an --output option, for writing results in a machine readable form.Daniel Dunbar2013-09-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190738 91177308-0d34-0410-b5e6-96231b3b80d8
* Make PrettyStackTraceEntry use ManagedStatic for its ThreadLocal.Filip Pizlo2013-09-13
| | | | | | | | | | | | This was somewhat tricky because ~PrettyStackTraceEntry() may run after llvm_shutdown() has been called. This is rare and only happens for a common idiom used in the main() functions of command-line tools. This works around the idiom by skipping the stack clean-up if the PrettyStackTraceHead ManagedStatic is not constructed (i.e. llvm_shutdown() has been called). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190730 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing break statement in PPCISelLoweringHal Finkel2013-09-13
| | | | | | As it turns out, not a problem in practice, but it should be there. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190720 91177308-0d34-0410-b5e6-96231b3b80d8
* Adds support for Atom Silvermont (SLM) - -march=slmPreston Gurd2013-09-13
| | | | | | | | | | | | | | Implements Instruction scheduler latencies for Silvermont, using latencies from the Intel Silvermont Optimization Guide. Auto detects SLM. Turns on post RA scheduler when generating code for SLM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190717 91177308-0d34-0410-b5e6-96231b3b80d8
* [Peephole] Rewrite copies to avoid cross register banks copies.Quentin Colombet2013-09-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By definition copies across register banks are not coalescable. Still, it may be possible to get rid of such a copy when the value is available in another register of the same register file. Consider the following example, where capital and lower letters denote different register file: b = copy A <-- cross-bank copy ... C = copy b <-- cross-bank copy This could have been optimized this way: b = copy A <-- cross-bank copy ... C = copy A <-- same-bank copy Note: b and C's definitions may be in different basic blocks. This patch adds a peephole optimization that looks through a chain of copies leading to a cross-bank copy and reuses a source that is on the same register file if available. This solution could also be used to get rid of some copies (e.g., A could have been used instead of C). However, we do not do so because: - It may over constrain the coloring of the source register for coalescing. - The register allocator may not be able to find a nice split point for the longer live-range, leading to more spill. <rdar://problem/14742333> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190713 91177308-0d34-0410-b5e6-96231b3b80d8
* Add warn_unused_result to empty() on various containers.Benjamin Kramer2013-09-13
| | | | | | empty() doesn't actually empty out the container, making this a common typo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190708 91177308-0d34-0410-b5e6-96231b3b80d8
* typo fix: use BUILD_ARCHIVE to build .a libs and not ARCHIVE_LIBRARYNuno Lopes2013-09-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190696 91177308-0d34-0410-b5e6-96231b3b80d8
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