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* Flesh out the list of things I've worked on.Duncan Sands2010-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112403 91177308-0d34-0410-b5e6-96231b3b80d8
* when merging two alias sets, the result set is volatile if eitherChris Lattner2010-08-29
| | | | | | | | | | of the sets is volatile. We were dropping the volatile bit of the merged in set, leading (luckily) to assertions in cases like PR7535. I cannot produce a testcase that repros with opt, but this is obviously correct. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112402 91177308-0d34-0410-b5e6-96231b3b80d8
* more cleanupChris Lattner2010-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112401 91177308-0d34-0410-b5e6-96231b3b80d8
* clean this upChris Lattner2010-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112400 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add a parameter to T2I_bin_irs for those patterns which set the S bit.Bill Wendling2010-08-29
| | | | | | | | - Create T2I_bin_sw_irs to be like T2I_bin_w_irs, but that it sets the S bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112399 91177308-0d34-0410-b5e6-96231b3b80d8
* merge a bunch of shuffle tests into sse2.llChris Lattner2010-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112398 91177308-0d34-0410-b5e6-96231b3b80d8
* add a bunch more common shuffles to the instprinter.Chris Lattner2010-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112397 91177308-0d34-0410-b5e6-96231b3b80d8
* add some nounwind'sChris Lattner2010-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112396 91177308-0d34-0410-b5e6-96231b3b80d8
* Name ANDflag to ANDS, which is less stupid.Bill Wendling2010-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112395 91177308-0d34-0410-b5e6-96231b3b80d8
* File missing from last commit.Bill Wendling2010-08-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112394 91177308-0d34-0410-b5e6-96231b3b80d8
* Create an ARMISD::AND node. This node is exactly like the "ARM::AND" node, butBill Wendling2010-08-29
| | | | | | | it sets the CPSR register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112393 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor change.NAKAMURA Takumi2010-08-28
| | | | | | This is test for git svn dcommit git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112389 91177308-0d34-0410-b5e6-96231b3b80d8
* I have manually decoded the imm field of an insertps one too manyChris Lattner2010-08-28
| | | | | | | | | | | | | | | | | | | times. This patch causes llc and llvm-mc (which both default to verbose-asm) to print out comments after a few common shuffle instructions which indicates the shuffle mask, e.g.: insertps $113, %xmm3, %xmm0 ## xmm0 = zero,xmm0[1,2],xmm3[1] unpcklps %xmm1, %xmm0 ## xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] pshufd $1, %xmm1, %xmm1 ## xmm1 = xmm1[1,0,0,0] This is carefully factored to keep the information extraction (of the shuffle mask) separate from the printing logic. I plan to move the extraction part out somewhere else at some point for other parts of the x86 backend that want to introspect on the behavior of shuffles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112387 91177308-0d34-0410-b5e6-96231b3b80d8
* fixme accomplishedChris Lattner2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112386 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy upChris Lattner2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112385 91177308-0d34-0410-b5e6-96231b3b80d8
* Add me to the "blame list"!NAKAMURA Takumi2010-08-28
| | | | | | | And it is my 1st test commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112384 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove obsolete keywords which are no longer relevant.Dan Gohman2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112382 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unions from the vim syntax highlighting.Dan Gohman2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112381 91177308-0d34-0410-b5e6-96231b3b80d8
* fix the buildvector->insertp[sd] logic to not always create a redundantChris Lattner2010-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | insertp[sd] $0, which is a noop. Before: _f32: ## @f32 pshufd $1, %xmm1, %xmm2 pshufd $1, %xmm0, %xmm3 addss %xmm2, %xmm3 addss %xmm1, %xmm0 ## kill: XMM0<def> XMM0<kill> XMM0<def> insertps $0, %xmm0, %xmm0 insertps $16, %xmm3, %xmm0 ret after: _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm3 addss %xmm1, %xmm3 movdqa %xmm2, %xmm0 insertps $16, %xmm3, %xmm0 ret The extra movs are due to a random (poor) scheduling decision. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112379 91177308-0d34-0410-b5e6-96231b3b80d8
* fix the BuildVector -> unpcklps logic to not do pointless shuffles Chris Lattner2010-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when the top elements of a vector are undefined. This happens all the time for X86-64 ABI stuff because only the low 2 elements of a 4 element vector are defined. For example, on: _Complex float f32(_Complex float A, _Complex float B) { return A+B; } We used to produce (with SSE2, SSE4.1+ uses insertps): _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $16, %xmm2, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm0 addss %xmm1, %xmm0 pshufd $16, %xmm0, %xmm1 movdqa %xmm2, %xmm0 unpcklps %xmm1, %xmm0 ret We now produce: _f32: ## @f32 movdqa %xmm0, %xmm2 addss %xmm1, %xmm2 pshufd $1, %xmm1, %xmm1 pshufd $1, %xmm0, %xmm3 addss %xmm1, %xmm3 movaps %xmm2, %xmm0 unpcklps %xmm3, %xmm0 ret This implements rdar://8368414 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112378 91177308-0d34-0410-b5e6-96231b3b80d8
* improve comments in the unpcklps generating logic, introduceChris Lattner2010-08-28
| | | | | | | | a new EltStride variable instead of reusing NumElems variable for a non-obvious purpose. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112377 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't cast Win32 FILETIME structs to int64. Patch by Dimitry Andric!Michael J. Spencer2010-08-28
| | | | | | | | | | | | | | | According to the Microsoft documentation here: http://msdn.microsoft.com/en-us/library/ms724284%28VS.85%29.aspx this cast used in lib/System/Win32/Path.inc: __int64 ft = *reinterpret_cast<__int64*>(&fi.ftLastWriteTime); should not be done. The documentation says: "Do not cast a pointer to a FILETIME structure to either a ULARGE_INTEGER* or __int64* value because it can cause alignment faults on 64-bit Windows." git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112376 91177308-0d34-0410-b5e6-96231b3b80d8
* remove the MSIL backend. It isn't maintained, is buggy, has no testcasesChris Lattner2010-08-28
| | | | | | | and hasn't kept up with ToT. Approved by Anton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112375 91177308-0d34-0410-b5e6-96231b3b80d8
* Update ocaml test.Benjamin Kramer2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112364 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unions from the ocaml bindings.Benjamin Kramer2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112363 91177308-0d34-0410-b5e6-96231b3b80d8
* Use pseudo instructions for VST1 and VST2.Bob Wilson2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112357 91177308-0d34-0410-b5e6-96231b3b80d8
* remove unions from LLVM IR. They are severely buggy and notChris Lattner2010-08-28
| | | | | | | being actively maintained, improved, or extended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112356 91177308-0d34-0410-b5e6-96231b3b80d8
* remove the ABCD and SSI passes. They don't have any clients thatChris Lattner2010-08-28
| | | | | | | | I'm aware of, aren't maintained, and LVI will be replacing their value. nlewycky approved this on irc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112355 91177308-0d34-0410-b5e6-96231b3b80d8
* remove dead protoChris Lattner2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112354 91177308-0d34-0410-b5e6-96231b3b80d8
* more dead thing zapping.Chris Lattner2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112353 91177308-0d34-0410-b5e6-96231b3b80d8
* zap dead methodChris Lattner2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112352 91177308-0d34-0410-b5e6-96231b3b80d8
* for completeness, allow undef also.Chris Lattner2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112351 91177308-0d34-0410-b5e6-96231b3b80d8
* squish dead code.Chris Lattner2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112350 91177308-0d34-0410-b5e6-96231b3b80d8
* zap dead codeChris Lattner2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112349 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up the logic of vector shuffles -> vector shifts.Bruno Cardoso Lopes2010-08-28
| | | | | | | | | | Also teach this logic how to handle target specific shuffles if needed, this is necessary while searching recursively for zeroed scalar elements in vector shuffle operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112348 91177308-0d34-0410-b5e6-96231b3b80d8
* handle the constant case of vector insertion. For somethingChris Lattner2010-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | like this: struct S { float A, B, C, D; }; struct S g; struct S bar() { struct S A = g; ++A.B; A.A = 42; return A; } we now generate: _bar: ## @bar ## BB#0: ## %entry movq _g@GOTPCREL(%rip), %rax movss 12(%rax), %xmm0 pshufd $16, %xmm0, %xmm0 movss 4(%rax), %xmm2 movss 8(%rax), %xmm1 pshufd $16, %xmm1, %xmm1 unpcklps %xmm0, %xmm1 addss LCPI1_0(%rip), %xmm2 pshufd $16, %xmm2, %xmm2 movss LCPI1_1(%rip), %xmm0 pshufd $16, %xmm0, %xmm0 unpcklps %xmm2, %xmm0 ret instead of: _bar: ## @bar ## BB#0: ## %entry movq _g@GOTPCREL(%rip), %rax movss 12(%rax), %xmm0 pshufd $16, %xmm0, %xmm0 movss 4(%rax), %xmm2 movss 8(%rax), %xmm1 pshufd $16, %xmm1, %xmm1 unpcklps %xmm0, %xmm1 addss LCPI1_0(%rip), %xmm2 movd %xmm2, %eax shlq $32, %rax addq $1109917696, %rax ## imm = 0x42280000 movd %rax, %xmm0 ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112345 91177308-0d34-0410-b5e6-96231b3b80d8
* Straighten out any triple strings passed on the command line beforeDuncan Sands2010-08-28
| | | | | | | they hit the rest of the system. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112344 91177308-0d34-0410-b5e6-96231b3b80d8
* optimize bitcasts from large integers to vector into vectorChris Lattner2010-08-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | element insertion from the pieces that feed into the vector. This handles a pattern that occurs frequently due to code generated for the x86-64 abi. We now compile something like this: struct S { float A, B, C, D; }; struct S g; struct S bar() { struct S A = g; ++A.A; ++A.C; return A; } into all nice vector operations: _bar: ## @bar ## BB#0: ## %entry movq _g@GOTPCREL(%rip), %rax movss LCPI1_0(%rip), %xmm1 movss (%rax), %xmm0 addss %xmm1, %xmm0 pshufd $16, %xmm0, %xmm0 movss 4(%rax), %xmm2 movss 12(%rax), %xmm3 pshufd $16, %xmm2, %xmm2 unpcklps %xmm2, %xmm0 addss 8(%rax), %xmm1 pshufd $16, %xmm1, %xmm1 pshufd $16, %xmm3, %xmm2 unpcklps %xmm2, %xmm1 ret instead of icky integer operations: _bar: ## @bar movq _g@GOTPCREL(%rip), %rax movss LCPI1_0(%rip), %xmm1 movss (%rax), %xmm0 addss %xmm1, %xmm0 movd %xmm0, %ecx movl 4(%rax), %edx movl 12(%rax), %esi shlq $32, %rdx addq %rcx, %rdx movd %rdx, %xmm0 addss 8(%rax), %xmm1 movd %xmm1, %eax shlq $32, %rsi addq %rax, %rsi movd %rsi, %xmm1 ret This resolves rdar://8360454 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112343 91177308-0d34-0410-b5e6-96231b3b80d8
* Completely disable tail calls when fast-isel is enabled, as fast-iselDan Gohman2010-08-28
| | | | | | | doesn't currently support dealing with this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112341 91177308-0d34-0410-b5e6-96231b3b80d8
* Trim a #include.Dan Gohman2010-08-28
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* Fix an index calculation thinko.Dan Gohman2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112337 91177308-0d34-0410-b5e6-96231b3b80d8
* We don't need to custom-select VLDMQ and VSTMQ anymore.Bob Wilson2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112336 91177308-0d34-0410-b5e6-96231b3b80d8
* Update CMake build. Add newline at end of file.Benjamin Kramer2010-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112332 91177308-0d34-0410-b5e6-96231b3b80d8
* When merging Thumb2 loads/stores, do not give up when the offset is one ofBob Wilson2010-08-27
| | | | | | | | | the special values that for ARM would be used with IB or DA modes. Fall through and consider materializing a new base address is it would be profitable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112329 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a prototype of a new peephole optimizing pass that uses LazyValue info ↵Owen Anderson2010-08-27
| | | | | | | | | to simplify PHIs and select's. This pass addresses the missed optimizations from PR2581 and PR4420. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112325 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve the precision of getConstant().Owen Anderson2010-08-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112323 91177308-0d34-0410-b5e6-96231b3b80d8
* Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson2010-08-27
| | | | | | | | | | | | | | | | | | | | all the other LDM/STM instructions. This fixes asm printer crashes when compiling with -O0. I've changed one of the NEON tests (vst3.ll) to run with -O0 to check this in the future. Prior to this change VLDM/VSTM used addressing mode #5, but not really. The offset field was used to hold a count of the number of registers being loaded or stored, and the AM5 opcode field was expanded to specify the IA or DB mode, instead of the standard ADD/SUB specifier. Much of the backend was not aware of these special cases. The crashes occured when rewriting a frameindex caused the AM5 offset field to be changed so that it did not have a valid submode. I don't know exactly what changed to expose this now. Maybe we've never done much with -O0 and NEON. Regardless, there's no longer any reason to keep a count of the VLDM/VSTM registers, so we can use addressing mode #4 and clean things up in a lot of places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112322 91177308-0d34-0410-b5e6-96231b3b80d8
* tidy up test.Chris Lattner2010-08-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112321 91177308-0d34-0410-b5e6-96231b3b80d8
* no really, fix the test.Chris Lattner2010-08-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112317 91177308-0d34-0410-b5e6-96231b3b80d8
* fix this test. It's not clear what it's really testing.Chris Lattner2010-08-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112316 91177308-0d34-0410-b5e6-96231b3b80d8
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