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* Revert "Prevent alias from pointing to weak aliases."Rafael Espindola2014-03-26
| | | | | | | | | This reverts commit r204781. I will follow up to with msan folks to see what is what they were trying to do with aliases to weak aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204784 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Generate logical vector VSX instructionsHal Finkel2014-03-26
| | | | | | | These instructions are essentially the same as their Altivec counterparts, but have access to the larger VSX register file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204782 91177308-0d34-0410-b5e6-96231b3b80d8
* Prevent alias from pointing to weak aliases.Rafael Espindola2014-03-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aliases are just another name for a position in a file. As such, the regular symbol resolutions are not applied. For example, given define void @my_func() { ret void } @my_alias = alias weak void ()* @my_func @my_alias2 = alias void ()* @my_alias We produce without this patch: .weak my_alias my_alias = my_func .globl my_alias2 my_alias2 = my_alias That is, in the resulting ELF file my_alias, my_func and my_alias are just 3 names pointing to offset 0 of .text. That is *not* the semantics of IR linking. For example, linking in a @my_alias = alias void ()* @other_func would require the strong my_alias to override the weak one and my_alias2 would end up pointing to other_func. There is no way to represent that with aliases being just another name, so the best solution seems to be to just disallow it, converting a miscompile into an error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204781 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Add fission-related sections to COFFDavid Blaikie2014-03-26
| | | | | | | Allows this test to pass on COFF platforms so we don't need to restrict this test to a single target anymore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204780 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly detect if a symbol uses a reserved section index or not.Rafael Espindola2014-03-26
| | | | | | | The logic was incorrect for variables, causing them to end up in the wrong section if the section had an index >= 0xff00. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204771 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Add broadcast instructions to the table used by ExeDepsFix pass.Quentin Colombet2014-03-26
| | | | | | | | | | | | | | | | | | | | | | Adds the different broadcast instructions to the ReplaceableInstrsAVX2 table. That way the ExeDepsFix pass can take better decisions when AVX2 broadcasts are across domain (int <-> float). In particular, prior to this patch we were generating: vpbroadcastd LCPI1_0(%rip), %ymm2 vpand %ymm2, %ymm0, %ymm0 vmaxps %ymm1, %ymm0, %ymm0 ## <- domain change penalty Now, we generate the following nice sequence where everything is in the float domain: vbroadcastss LCPI1_0(%rip), %ymm2 vandps %ymm2, %ymm0, %ymm0 vmaxps %ymm1, %ymm0, %ymm0 <rdar://problem/16354675> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204770 91177308-0d34-0410-b5e6-96231b3b80d8
* Create .symtab_shndxr only when needed.Rafael Espindola2014-03-25
| | | | | | | | | | | | | | | | | | | | | | | We need .symtab_shndxr if and only if a symbol references a section with an index >= 0xff00. The old code was trying to figure out if the section was needed ahead of time, making it a fairly dependent on the code actually writing the table. It was also somewhat conservative and would create the section in cases where it was not needed. If I remember correctly, the old structure was there so that the sections were created in the same order gas creates them. That was valuable when MC's support for ELF was new and we tested with elf-dump.py. This patch refactors the symbol table creation to another class and makes it obvious that .symtab_shndxr is really only created when we are about to output a reference to a section index >= 0xff00. While here, also improve the tests to use macros. One file is one section short of needing .symtab_shndxr, the second one has just the right number. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204769 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Select between VSX A-type and M-type FMA instructions just before RAHal Finkel2014-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The VSX instruction set has two types of FMA instructions: A-type (where the addend is taken from the output register) and M-type (where one of the product operands is taken from the output register). This adds a small pass that runs just after MI scheduling (and, thus, just before register allocation) that mutates A-type instructions (that are created during isel) into M-type instructions when: 1. This will eliminate an otherwise-necessary copy of the addend 2. One of the product operands is killed by the instruction The "right" moment to make this decision is in between scheduling and register allocation, because only there do we know whether or not one of the product operands is killed by any particular instruction. Unfortunately, this also makes the implementation somewhat complicated, because the MIs are not in SSA form and we need to preserve the LiveIntervals analysis. As a simple example, if we have: %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9 %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16, %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16 ... %vreg9<def,tied1> = XSMADDADP %vreg9<tied0>, %vreg17, %vreg19, %RM<imp-use>; VSLRC:%vreg9,%vreg17,%vreg19 ... We can eliminate the copy by changing from the A-type to the M-type instruction. This means: %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16, %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16 is replaced by: %vreg16<def,tied1> = XSMADDMDP %vreg16<tied0>, %vreg18, %vreg9, %RM<imp-use>; VSLRC:%vreg16,%vreg18,%vreg9 and we remove: %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204768 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/DebugInfo/empty.ll: Suppress crash for targeting pecoff while ↵NAKAMURA Takumi2014-03-25
| | | | | | investigating. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204766 91177308-0d34-0410-b5e6-96231b3b80d8
* Use Endian.h to simplify this code a bit.Rafael Espindola2014-03-25
| | | | | | | While at it, factor some logic into FragmentWriter. This will allow more code to be factored out of the fairly large ELFObjectWriter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204765 91177308-0d34-0410-b5e6-96231b3b80d8
* [configure/make] Propagate names of build host tools when making BuildToolsMeador Inge2014-03-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When cross-compiling LLVM itself the configure/make scripts get confused when creating the needed build host tools. For example, building and configuring like: CC_FOR_BUILD='i686-pc-linux-gnu-gcc' CXX_FOR_BUILD='i686-pc-linux-gnu-g++' CXX='i686-mingw32-g++' CC='i686-mingw32-gcc' LD='i686-mingw32-ld' /scratch /meadori/llvm-trunk/src/trunk/configure --host=i686-mingw32 CC_FOR_BUILD='i686-pc-linux-gnu-gcc' CXX_FOR_BUILD='i686-pc-linux-gnu-g++' CXX='i686-mingw32-g++' CC='i686-mingw32-gcc' LD='i686-mingw32-ld' make causes the following build break: checking whether the C compiler works... configure: error: cannot run C compiled programs. If you meant to cross compile, use `--host'. See `config.log' for more details. The 'config.log' shows that i686-mingw32-gcc is being used to create executables for the build host. This patch fixes the problem by propogating the names of the build host tools via BUILD_* when configuring/making BuildTools. Original patch by Ekaterina Sanina. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204760 91177308-0d34-0410-b5e6-96231b3b80d8
* [Constant Hoisting] Make the constant candidate map local to the ↵Juergen Ributzka2014-03-25
| | | | | | collectConstantCandidates method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204758 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Correct commutable indices for VSX FMA instructionsHal Finkel2014-03-25
| | | | | | | | | | Although the first two operands are the ones that can be swapped, the tied input operand is listed before them, so we need to adjust for that. I have a test case for this, but it goes along with an upcoming commit (so it will come soon). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204748 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add a TableGen relation for A-type and M-type VSX FMA instructionsHal Finkel2014-03-25
| | | | | | | TableGen will create a lookup table for the A-type FMA instructions providing their corresponding M-form opcodes. This will be used by upcoming commits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204746 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Move computeMaskedBitsForTargetNode out of AMDILISelLowering.cppMatt Arsenault2014-03-25
| | | | | | | | Remove handling of select_cc, since it makes no sense to be there. This now does nothing, but I'll be adding some handling of other target nodes soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204743 91177308-0d34-0410-b5e6-96231b3b80d8
* blockfreq: Implement Pass::releaseMemory()Duncan P. N. Exon Smith2014-03-25
| | | | | | | | | | Implement Pass::releaseMemory() in BlockFrequencyInfo and MachineBlockFrequencyInfo. Just delete the private implementation when not in use. Switch to a std::unique_ptr to make the logic more clear. <rdar://problem/14292693> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204741 91177308-0d34-0410-b5e6-96231b3b80d8
* blockfreq: Use const in MachineBlockFrequencyInfoDuncan P. N. Exon Smith2014-03-25
| | | | | | <rdar://problem/14292693> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204740 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86TTI] Make constant base pointers for getElementPtr opaque.Juergen Ributzka2014-03-25
| | | | | | | | | If getElementPtr uses a constant as base pointer, then make the constant opaque. This prevents constant folding it with the offset. The offset can usually be encoded in the load/store instruction itself and the base address doesn't have to be rematerialized several times. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204739 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps][X86TTI] Fix think-o in getIntImmCost calculation.Juergen Ributzka2014-03-25
| | | | | | | | The cost for the first four stackmap operands was always TCC_Free. This is only true for the first two operands. All other operands are TCC_Free if they are within 64bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204738 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAG] Keep the opaque constant flag when performing unary constant folding ↵Juergen Ributzka2014-03-25
| | | | | | | | | | | | operations. Usually opaque constants shouldn't be folded, unless they are simple unary operations that don't create new constants. Although this shouldn't drop the opaque constant flag. This commit fixes this. Related to <rdar://problem/14774662> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204737 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Generate VPSHUFB for in-place v16i16 shufflesAdam Nemet2014-03-25
| | | | | | | | | This used to resort to splitting the 256-bit operation into two 128-bit shuffles and then recombining the results. Fixes <rdar://problem/16167303> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204735 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Factor out new helper getPSHUFBAdam Nemet2014-03-25
| | | | | | | | | | | | | | | | | | | | I found three implementations of this. This splits it out into a new function and uses it from the three places. My plan is to add a fourth use when lowering a vector_shuffle:v16i16. Compared the assembly output of test/CodeGen/X86 before and after. The only change is due to how the first PSHUFB was generated in LowerVECTOR_SHUFFLEv8i16. If the shuffle mask specified undef (i.e. -1), the old implementation would write -1 * 2 and -1 * 2 + 1 (254 and 255) in the control mask. Now we write 0x80. These are of course interchangeable since bit 7 decides if a constant zero is written in the result byte. The other instances of this code use 0x80 consistently. Related to <rdar://problem/16167303> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204734 91177308-0d34-0410-b5e6-96231b3b80d8
* [InstCombine] Don't fold bitcast into store if it would need addrspacecastRichard Osborne2014-03-25
| | | | | | | | | | | | | | | | | | Summary: Previously the code didn't check if the before and after types for the store were pointers to different address spaces. This resulted in instcombine using a bitcast to convert between pointers to different address spaces, causing an assertion due to the invalid cast. It is not be appropriate to use addrspacecast this case because it is not guaranteed to be a no-op cast. Instead bail out and do not do the transformation. CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D3117 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204733 91177308-0d34-0410-b5e6-96231b3b80d8
* Reuse earlier variables to make it clear the types involved in the cast.Richard Osborne2014-03-25
| | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204732 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing slash to make the doxygen output less confusing.Benjamin Kramer2014-03-25
| | | | | | PR19187. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204731 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Add failing testcase for <3 x i32> stores.Matt Arsenault2014-03-25
| | | | | | | This is supposed to have the same store size and alignment as <4 x i32>, but currently is split into a 64-bit and 32-bit store. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204729 91177308-0d34-0410-b5e6-96231b3b80d8
* ScalarEvolution: Compute exit counts for loops with a power-of-2 step.Benjamin Kramer2014-03-25
| | | | | | | | | | | | | If we have a loop of the form for (unsigned n = 0; n != (k & -32); n += 32) {} then we know that n is always divisible by 32 and the loop must terminate. Even if we have a condition where the loop counter will overflow it'll always hold this invariant. PR19183. Our loop vectorizer creates this pattern and it's also occasionally formed by loop counters derived from pointers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204728 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix creating illegal setcc cond codes.Matt Arsenault2014-03-25
| | | | | | | | | | | | | | If GT/UGT or LT/ULT were set to expand, a comparison with a constant would replace it with the illegal cond code. There are several more places later in this function that will have the same basic problem. Theoretically R600 should hit this problem for a test, but for some reason it doesn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204727 91177308-0d34-0410-b5e6-96231b3b80d8
* [msan] Relax the test some more.Evgeniy Stepanov2014-03-25
| | | | | | | | This may or may not fix the bots. R204720 did not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204721 91177308-0d34-0410-b5e6-96231b3b80d8
* [msan] Make some tests less strict.Evgeniy Stepanov2014-03-25
| | | | | | | This may or may not fix the bots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204720 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix these tests on windows.Rafael Espindola2014-03-25
| | | | | | | | | It is impossible to create a hard link to a non existing file, so create a dummy file, create the link an delete the dummy file. On windows one cannot remove the current directory, so chdir first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204719 91177308-0d34-0410-b5e6-96231b3b80d8
* [msan] More precise instrumentation of select IR.Evgeniy Stepanov2014-03-25
| | | | | | | | | | Some bits of select result may be initialized even if select condition is not. https://code.google.com/p/memory-sanitizer/issues/detail?id=50 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204716 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] '.set at=$0' should be equivalent to '.set noat'Daniel Sanders2014-03-25
| | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D3171 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204714 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix AVX2 Gather execution domains. Cameron McInally2014-03-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204713 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Correct testcase for .set at=$reg and emit the new warnings for ↵Daniel Sanders2014-03-25
| | | | | | | | | | | | | | | | | | numeric registers too. Summary: Remove the XFAIL added in my previous commit and correct the test such that it correctly tests the expansion of the assembler temporary. Also added a test to check that $at is always $1 when written by the user. Corrected the new assembler temporary warnings so that they are emitted for numeric registers too. Differential Revision: http://llvm-reviews.chandlerc.com/D3169 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204711 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix assembler temporary expansion and add associated warnings about ↵Daniel Sanders2014-03-25
| | | | | | | | | | | | | | | | | | | | | | | | the use of $at. Summary: The assembler temporary is normally $at ($1) but can be reassigned using '.set at=$reg'. Regardless of which register is nominated as the assembler temporary, $at remains $1 when written by the user. Adds warnings under the following conditions: * The register nominated as the assembler temporary is used by the user. * '.set noat' is in effect and $at is used by the user. Both of these only work for named registers. I have a follow up commit that makes it work for numeric registers as well. XFAIL set-at-directive.s since it incorrectly tests that $at is redefined by '.set at=$reg'. Testcases will follow in a separate commit. Patch by David Chisnall His work was sponsored by: DARPA, AFRL Differential Revision: http://llvm-reviews.chandlerc.com/D3167 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204710 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove cmake module support for Visual C++ 2010 (MSVC10)Yaron Keren2014-03-25
| | | | | | | | but keep the MSVC11 (Visual C++ 2012) support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204706 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify loop that worked around bugs in old GCC/Xcode.Erik Verbruggen2014-03-25
| | | | | | | GCC 4.0.1 and Xcode 2 are no longer supported for building llvm/clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204705 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable Visual C++ warning 4722 about aborting a destructor,Yaron Keren2014-03-25
| | | | | | | | it has no value for us. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204704 91177308-0d34-0410-b5e6-96231b3b80d8
* WinCOFF: Add support for -fdata-sectionsDavid Majnemer2014-03-25
| | | | | | | | | | | | This is a pretty straight forward translation for COFF, we just need to stick the data in a COMDAT section marked as IMAGE_COMDAT_SELECT_NODUPLICATES. N.B. We must be careful to avoid sticking entities with private linkage in COMDAT groups. COFF is pretty hostile to the renaming of entities so we must be careful to disallow GlobalVariables with unstable names. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204703 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Add GNU_addr_base and GNU_ranges_base only when there are ↵David Blaikie2014-03-25
| | | | | | | | addresses or ranges Based on code review feedback from Eric in r204672. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204702 91177308-0d34-0410-b5e6-96231b3b80d8
* test: fix CHECK linesSaleem Abdulrasool2014-03-25
| | | | | | Thanks to gix for pointing out that the CHECK-LABEL lines were incorrect! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204700 91177308-0d34-0410-b5e6-96231b3b80d8
* SLP vectorizer: Don't hoist vector extracts of phis.Andrew Trick2014-03-25
| | | | | | | | | | | | | Extracts coming from phis were being hoisted, while all others were sunk to their uses. This was inconsistent and didn't seem to serve a purpose. Changing all extracts to be sunk to uses is a prerequisite for adding block frequency to the SLP vectorizer's cost model. I benchmarked the change in isolation (without block frequency). I only saw noise on x86 and some potentially significant improvements on ARM. No major regressions is good enough for me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204699 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Support debug_loc under fissionDavid Blaikie2014-03-25
| | | | | | | | | | | | | | | | | | | | | | Implement debug_loc.dwo, as well as llvm-dwarfdump support for dumping this section. Outlined in the DWARF5 spec and http://gcc.gnu.org/wiki/DebugFission the debug_loc.dwo section has more variation than the standard debug_loc, allowing 3 different forms of entry (plus the end of list entry). GCC seems to, and Clang certainly, only use one form, so I've just implemented dumping support for that for now. It wasn't immediately obvious that there was a good refactoring to share the implementation of dumping support between debug_loc and debug_loc.dwo, so they're separate for now - ideas welcome or I may come back to it at some point. As per a comment in the code, we could choose different forms that may reduce the number of debug_addr entries we emit, but that will require further study. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204697 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Remove unnecessary zero-size checkDavid Blaikie2014-03-25
| | | | | | | | | This seems excessive - switching section isn't expensive (or if it is we're already being wasteful, since we emitted the debug_loc section symbol earlier anyway) and otherwise there's no work that happens in this function when the list is empty. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204696 91177308-0d34-0410-b5e6-96231b3b80d8
* Support: Functions for consuming endian specific data from a buffer.Justin Bogner2014-03-25
| | | | | | | | This adds a function to Endian.h that reads from and updates a pointer into a buffer with endian specific data. This is more convenient for stream-like reading of data than endian::read. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204693 91177308-0d34-0410-b5e6-96231b3b80d8
* Register Allocator: check other options before using a CSR for the first time.Manman Ren2014-03-25
| | | | | | | | | | | | | | | | | | | | When register allocator's stage is RS_Spill, we choose spill over using the CSR for the first time, if the spill cost is lower than CSRCost. When register allocator's stage is < RS_Split, we choose pre-splitting over using the CSR for the first time, if the cost of splitting is lower than CSRCost. CSRCost is set with command-line option "regalloc-csr-first-time-cost". The default value is 0 to generate the same codes as before this commit. With a value of 15 (1 << 14 is the entry frequency), I measured performance gain of 3% on 253.perlbmk and 1.7% on 197.parser, with instrumented PGO, on an arm device. rdar://16162005 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204690 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix crashes when assembler directives are used that are notKevin Enderby2014-03-25
| | | | | | | | | for Mach-O object files by generating an error instead. rdar://16335232 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204687 91177308-0d34-0410-b5e6-96231b3b80d8
* Register Allocator: refactoring (no functionality change).Manman Ren2014-03-24
| | | | | | | | | | Factor out two functions calculateRegionSplitCost and doRegionSplit from tryRegionSplit. These two functions will be used in coming patches. rdar://16162005 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204684 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Simplify debug loc list handling by keeping separate listsDavid Blaikie2014-03-24
| | | | | | | Rather than using a flat list with "empty" entries (ala the actual on-disk format), keep separate lists for each variable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204680 91177308-0d34-0410-b5e6-96231b3b80d8
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