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path: root/include/llvm/CodeGen/ISDOpcodes.h
Commit message (Expand)AuthorAge
* Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover2013-04-20
* Fix PR10475Michael Liao2013-03-01
* Teach SDISel to combine fsin / fcos into a fsincos node if the followingEvan Cheng2013-01-29
* Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. S...Sylvestre Ledru2012-09-27
* Fix a typo 'iff' => 'if'Sylvestre Ledru2012-09-27
* Add a new optimization pass: Stack Coloring, that merges disjoint static allo...Nadav Rotem2012-09-06
* Add SelectionDAG::getTargetIndex.Jakob Stoklund Olesen2012-08-07
* Doxygenify the comments of ISD nodes.Nadav Rotem2012-07-23
* Typo. Patch by Cameron McInally <cameron.mcinally@nyu.edu>.Chad Rosier2012-06-19
* Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer2012-06-02
* Rename @llvm.debugger to @llvm.debugtrap.Dan Gohman2012-05-14
* Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman2012-05-11
* Add a RegisterMaskSDNode class.Jakob Stoklund Olesen2012-01-18
* Document the fact that the selection dag changes the vselect condition typeNadav Rotem2012-01-18
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-13
* Remove dead llvm.eh.sjlj.dispatchsetup intrinsic.Bill Wendling2011-11-28
* Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented toBill Wendling2011-10-07
* Add codegen support for vector select (in the IR this means a selectDuncan Sands2011-09-06
* Split the init.trampoline intrinsic, which currently combines GCC'sDuncan Sands2011-09-06
* Basic x86 code generation for atomic load and store instructions.Eli Friedman2011-08-24
* Code generation for 'fence' instruction.Eli Friedman2011-07-27
* Add an intrinsic and codegen support for fused multiply-accumulate. The intentCameron Zwarich2011-07-08
* Add one more argument to the prefetch intrinsic to indicate whether it's a dataBruno Cardoso Lopes2011-06-14
* Fix comment.Bill Wendling2011-05-11
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-15
* fix thinko :)Chris Lattner2011-02-13
* Revisit my fix for PR9028: the issue is that DAGCombine was Chris Lattner2011-02-13
* [AVX] Add INSERT_SUBVECTOR and support it on x86. This provides aDavid Greene2011-01-26
* Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng2011-01-07
* Fix comment. INLINEASM node operand #3 is IsAlignStack bit.Evan Cheng2011-01-07
* Change EXTRACT_SUBVECTOR to require a constant index.Bob Wilson2011-01-07
* Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.Wesley Peck2010-11-23
* Spelling typo fix. s/incput/input/. Thanks, Bob!Jim Grosbach2010-10-19
* Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do anyJim Grosbach2010-10-19
* This is the first step towards refactoring the x86 vector shuffle code. TheBruno Cardoso Lopes2010-08-20
* Update comment to remove special case for vector extending loads. AnBob Wilson2010-08-19
* When splitting a VAARG, remember its alignment.Rafael Espindola2010-06-26
* Grammar.Jim Grosbach2010-06-18
* back out 104862/104869. Can reuse stacksave after all. Very cool.Jim Grosbach2010-05-27
* add ISD::STACKADDR to get the current stack pointer. Will be used by sjlj EHJim Grosbach2010-05-27
* Adjust eh.sjlj.setjmp to properly have a chain and to have an opcode entry inJim Grosbach2010-05-26
* Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.Jim Grosbach2010-05-22
* Elaborate on a comment.Dan Gohman2010-04-29
* Split ISD::NodeType and a few related items out of SelectionDAGNodes.hDan Gohman2010-04-14