| Commit message (Collapse) | Author | Age |
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The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze
The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
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to be aligned with optimal nops. This patch does not change any functionality
and when the compiler is changed to use EmitCodeAlignment() it should also not
change the resulting output. Once the compiler change is made and everything
looks good the next patch with the table of optimal X86 nops will be added to
WriteNopData() changing the output. There are many FIXMEs in this patch which
will be removed when we have better target hooks (coming soon I hear).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96963 91177308-0d34-0410-b5e6-96231b3b80d8
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Does not work, but the infrastructure changes are in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96920 91177308-0d34-0410-b5e6-96231b3b80d8
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For now, just enough support to make -filelist work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96918 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96916 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96844 91177308-0d34-0410-b5e6-96231b3b80d8
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VBR encoding for the insanity being perpetrated by the spu backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96843 91177308-0d34-0410-b5e6-96231b3b80d8
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ridiculously ginormous patterns and need more than one byte
of displacement for encodings. This fixes CellSPU/fdiv.ll.
SPU is still doing something else ridiculous though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96833 91177308-0d34-0410-b5e6-96231b3b80d8
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126.gcc nightly tests. These failures uncovered latent bugs that machine DCE
could remove one half of a stack adjust down/up pair, causing PEI to assert.
This update fixes that, and the tests now pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96822 91177308-0d34-0410-b5e6-96231b3b80d8
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isel doesn't know the correct # results. This fixes 8 codegen tests,
down to 22 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96815 91177308-0d34-0410-b5e6-96231b3b80d8
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has one of the list of acceptable opcodes for a complex
pattern. This fixes 4 regtest failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96814 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96812 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96779 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96776 91177308-0d34-0410-b5e6-96231b3b80d8
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CodeGen/X86/pr2182.ll. Down to 13 x86 failures out of ~1100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96770 91177308-0d34-0410-b5e6-96231b3b80d8
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result nodes correctly. Note that this includes a horrible hack
in DAGISelHeader which cannot be fixed reasonably without
eliminating (parallel) from input patterns. That, in turn,
can't be done until we support writing multiple result patterns
for the X86and_flag and related multiple-result nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96767 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96762 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96761 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96758 91177308-0d34-0410-b5e6-96231b3b80d8
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for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there.
This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96755 91177308-0d34-0410-b5e6-96231b3b80d8
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MVT::iPTR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96753 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96752 91177308-0d34-0410-b5e6-96231b3b80d8
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utility. Down to 6 ppc failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96751 91177308-0d34-0410-b5e6-96231b3b80d8
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<4 x i32> with <4 x float> values if they end up the same
register class. This gets us up to 231 passes on the ppc
tests (only 7 fails).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96750 91177308-0d34-0410-b5e6-96231b3b80d8
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sync with the top of stack. This fixes a bunch of failures on larger
testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96732 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96731 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96728 91177308-0d34-0410-b5e6-96231b3b80d8
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of the matched pattern to use the newly created node results. Onto
the "making it actually work" phase!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96724 91177308-0d34-0410-b5e6-96231b3b80d8
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2GB-aligned stack anyway? 256 bytes is plenty. Requested by Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96718 91177308-0d34-0410-b5e6-96231b3b80d8
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the point where it is to the 95% feature complete mark, it just
needs result updating to be done (then testing, optimization
etc).
More specificallly, this adds support for chain and flag handling
on the result nodes, support for sdnodexforms, support for variadic
nodes, memrefs, pinned physreg inputs, and probably lots of other
stuff.
In the old DAGISelEmitter, this deletes the dead code related to
OperatorMap, cleans up a variety of dead stuff handling "implicit
remapping" from things like globaladdr -> targetglobaladdr (which
is no longer used because globaladdr always needs to be legalized),
and some minor formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96716 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96714 91177308-0d34-0410-b5e6-96231b3b80d8
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the same thing and is more efficient for the matcher.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96713 91177308-0d34-0410-b5e6-96231b3b80d8
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the armv6 nightly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96691 91177308-0d34-0410-b5e6-96231b3b80d8
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ARM and Thumb tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96680 91177308-0d34-0410-b5e6-96231b3b80d8
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This change probably has no functional effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96669 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96663 91177308-0d34-0410-b5e6-96231b3b80d8
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to be spurious
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96662 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96653 91177308-0d34-0410-b5e6-96231b3b80d8
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This hopefulyl should unbreak EH on PPC/Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96637 91177308-0d34-0410-b5e6-96231b3b80d8
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for ARM to just check if a function has a FP to determine if it's safe
to simplify the stack adjustment pseudo ops prior to eliminating frame
indices. Allow targets to override the default behavior and does so for ARM
and Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96634 91177308-0d34-0410-b5e6-96231b3b80d8
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a loop exit value, so that if a loop gets deleted, ScalarEvolution
isn't stick holding on to dangling SCEVAddRecExprs for that loop. This
fixes PR6339.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96626 91177308-0d34-0410-b5e6-96231b3b80d8
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index
which is not always true if the mask contains undefs. Modified it to return
the first non undef value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96621 91177308-0d34-0410-b5e6-96231b3b80d8
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building the tree to represent them but not emitting
table entries for them yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96617 91177308-0d34-0410-b5e6-96231b3b80d8
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Moderate the weight given to very small intervals.
The spill weight given to new intervals created when spilling was not
normalized in the same way as the original spill weights calculated by
CalcSpillWeights. That meant that restored registers would tend to hang around
because they had a much higher spill weight that unspilled registers.
This improves the runtime of a few tests by up to 10%, and there are no
significant regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96613 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96610 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96609 91177308-0d34-0410-b5e6-96231b3b80d8
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Also, have tools output -help-hidden rather than refer to --help-hidden,
for consistency, and likewise adjust documentation. This doesn't change
every mention of --help, only those which seemed clearly safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96578 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96533 91177308-0d34-0410-b5e6-96231b3b80d8
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CSE'd or otherwise combined with temporal MemSDNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96505 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96503 91177308-0d34-0410-b5e6-96231b3b80d8
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