summaryrefslogtreecommitdiff
path: root/include
Commit message (Collapse)AuthorAge
* Correct MCJIT functionality for MIPS32 architecture.Akira Hatanaka2012-08-17
| | | | | | | | | | | No new tests are added. All tests in ExecutionEngine/MCJIT that have been failing pass after this patch is applied (when "make check" is done on a mips board). Patch by Petar Jovanovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162135 91177308-0d34-0410-b5e6-96231b3b80d8
* Add stub methods for mips assembly matcher. Akira Hatanaka2012-08-17
| | | | | | | Patch by Vladimir Medic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
* MemoryBuiltins: Properly guard ObjectSizeOffsetVisitor against cycles in the IR.Benjamin Kramer2012-08-17
| | | | | | | | | | The previous fix only checked for simple cycles, use a set to catch longer cycles too. Drop the broken check from the ObjectSizeOffsetEvaluator. The BoundsChecking pass doesn't have to deal with invalid IR like InstCombine does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162120 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the `linker_private_weak_def_auto' linkage to `linkonce_odr_auto_hide' toBill Wendling2012-08-17
| | | | | | | | | | | | | | | | | | | | | make it more consistent with its intended semantics. The `linker_private_weak_def_auto' linkage type was meant to automatically hide globals which never had their addresses taken. It has nothing to do with the `linker_private' linkage type, which outputs the symbols with a `l' (ell) prefix among other things. The intended semantic is more like the `linkonce_odr' linkage type. Change the name of the linkage type to `linkonce_odr_auto_hide'. And therefore changing the semantics so that it produces the correct output for the linker. Note: The old linkage name `linker_private_weak_def_auto' will still parse but is not a synonym for `linkonce_odr_auto_hide'. This should be removed in 4.0. <rdar://problem/11754934> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162114 91177308-0d34-0410-b5e6-96231b3b80d8
* Insertion of NoFolder functions to avoid ambiguous overload warnings or ↵Jin-Gu Kang2012-08-17
| | | | | | errors about whether to convert Idx to ArrayRef<Constant *> or ArrayRef<Value *> like ConstantFolder and TargetFolder. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162090 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commit.Pranav Bhandarkar2012-08-17
| | | | | | | | include/llvm/IntrinsicsHexagon.td: Hexagon_Intrinsic is the base class for all Hexagon intrinsics and not altivec intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162087 91177308-0d34-0410-b5e6-96231b3b80d8
* Flatten the aligned-char-array utility template to be a directlyChandler Carruth2012-08-17
| | | | | | | templated union at the request of Richard Smith. This makes it substantially easier to type. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162072 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an MCID::Select flag and TII hooks for optimizing selects.Jakob Stoklund Olesen2012-08-16
| | | | | | | | | | | | Select instructions pick one of two virtual registers based on a condition, like x86 cmov. On targets like ARM that support predication, selects can sometimes be eliminated by predicating the instruction defining one of the operands. Teach PeepholeOptimizer to recognize select instructions, and ask the target to optimize them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162059 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r162034, r162035 and r162037.Roman Divacky2012-08-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162039 91177308-0d34-0410-b5e6-96231b3b80d8
* Add PPC64 relocations definitions, by Adhemerval Zanella.Roman Divacky2012-08-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162035 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle PowerPC.Roman Divacky2012-08-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162034 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach GVN to reason about edges dominating uses. This allows it to handle casesRafael Espindola2012-08-16
| | | | | | | | | | | | | where some fact lake a=b dominates a use in a phi, but doesn't dominate the basic block itself. This feature could also be implemented by splitting critical edges, but at least with the current algorithm reasoning about the dominance directly is faster. The time for running "opt -O2" in the testcase in pr10584 is 1.003 times slower and on gcc as a single file it is 1.0007 times faster. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162023 91177308-0d34-0410-b5e6-96231b3b80d8
* Add dump/dumpr methods to SDValue.Nadav Rotem2012-08-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162014 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a CoveringSubRegIndices field to SubRegIndex records.Jakob Stoklund Olesen2012-08-15
| | | | | | | This can be used to tell TableGen to use a specific SubRegIndex instead of synthesizing one when discovering all sub-registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161982 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly test the LLVM_USE_RVALUE_REFERENCES macro.Michael J. Spencer2012-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161978 91177308-0d34-0410-b5e6-96231b3b80d8
* [PathV2] Add mapped_file_region. Implementation for Windows and POSIX.Michael J. Spencer2012-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161976 91177308-0d34-0410-b5e6-96231b3b80d8
* Add LLVM_DELETED_FUNCTION compatibility macro.Michael J. Spencer2012-08-15
| | | | | | | | | | | | This should replace uses of: class A { A(const &A); // DO NOT IMPLEMENT public: ... }; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161975 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo in VariadicFunction.h that leads to invalid code in macro expansion.Chad Rosier2012-08-15
| | | | | | Patch by Andy Gibbs <andyg1001@hotmail.co.uk> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161973 91177308-0d34-0410-b5e6-96231b3b80d8
* Set the branch probability of branching to the 'normal' destination of an invokeBill Wendling2012-08-15
| | | | | | | | | | | instruction to something absurdly high, while setting the probability of branching to the 'unwind' destination to the bare minimum. This should set cause the normal destination's invoke blocks to be moved closer to the invoke. PR13612 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161944 91177308-0d34-0410-b5e6-96231b3b80d8
* [yaml2obj] Fix incorrect use of signed values.Michael J. Spencer2012-08-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161900 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch the fixed-length disassembler to be table-driven.Jim Grosbach2012-08-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the TableGen'erated fixed length disassemblmer to use a table-driven state machine rather than a massive set of nested switch() statements. As a result, the ARM Disassembler (ARMDisassembler.cpp) builds much more quickly and generates a smaller end result. For a Release+Asserts build on a 16GB 3.4GHz i7 iMac w/ SSD: Time to compile at -O2 (averaged w/ hot caches): Previous: 35.5s New: 8.9s TEXT size: Previous: 447,251 New: 297,661 Builds in 25% of the time previously required and generates code 66% of the size. Execution time of the disassembler is only slightly slower (7% disassembling 10 million ARM instructions, 19.6s vs 21.0s). The new implementation has not yet been tuned, however, so the performance should almost certainly be recoverable should it become a concern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161888 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid undefined behavior in DenseMap::shrink_and_clear(). Log2_32_Ceil(0)Richard Smith2012-08-14
| | | | | | | | returns 32. This change mirrors the corresponding code in SmallDenseMap::shrink_and_clear(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161829 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a roundToIntegral method to APFloat, which can be parameterized over ↵Owen Anderson2012-08-13
| | | | | | various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161807 91177308-0d34-0410-b5e6-96231b3b80d8
* LICM uses AliasSet information to hoist and sink instructions. However, ↵Nadav Rotem2012-08-13
| | | | | | | | | | | | | | other passes, such as LoopRotate may invalidate its AliasSet because SSAUpdater does not update the AliasSet properly. This patch teaches SSAUpdater to notify AliasSet that it made changes. The testcase in PR12901 is too big to be useful and I could not reduce it to a normal size. rdar://11872059 PR12901 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161803 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the TII::scheduleTwoAddrSource() hook.Jakob Stoklund Olesen2012-08-13
| | | | | | | | | | | | | | | It never does anything when running 'make check', and it get's in the way of updating live intervals in 2-addr. The hook was originally added to help form IT blocks in Thumb2 code before register allocation, but the pass ordering has changed since then, and we run if-conversion after register allocation now. When the MI scheduler is enabled, there will be no less than two schedulers between 2-addr and Thumb2ITBlockPass, so this hook is unlikely to help anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161794 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a documentation typo.Nadav Rotem2012-08-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161758 91177308-0d34-0410-b5e6-96231b3b80d8
* Create isXBitVector methods in MVT and call them from EVT. This allows ↵Craig Topper2012-08-11
| | | | | | targets to call them with an MVT without needing to convert to EVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161731 91177308-0d34-0410-b5e6-96231b3b80d8
* A couple of addition comment fixesEli Bendersky2012-08-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161678 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a couple of typos in commentsEli Bendersky2012-08-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161677 91177308-0d34-0410-b5e6-96231b3b80d8
* Move BasicBlockEdge to the cpp file. No functionality change.Rafael Espindola2012-08-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161663 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some missing includes for the build against stdcxx.Joerg Sonnenberger2012-08-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161657 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove references to compression in llvm-ar. It has been a long time since weRafael Espindola2012-08-10
| | | | | | switched from a bytecode+bzip2 to the current bitcode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161651 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r161633-161634 "Partition use lists so defs always come before uses.""Jakob Stoklund Olesen2012-08-10
| | | | | | | No changes to these patches, MRI needed to be notified when changing uses into defs and vice versa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161644 91177308-0d34-0410-b5e6-96231b3b80d8
* Also update MRI use lists when changing a use to a def and vice versa.Jakob Stoklund Olesen2012-08-10
| | | | | | This was the cause of the buildbot failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161643 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add a new Inline Asm Non-Standard Dialect attribute.Chad Rosier2012-08-10
| | | | | | | | | | | | | | This new attribute is intended to be used by the backend to determine how the inline asm string should be parsed/printed. This patch adds the ia_nsdialect attribute and also adds a test case to ensure the IR is correctly parsed, but there is no functional change at this time. The standard dialect is assumed to be AT&T. Therefore, this attribute should only be added to MS-style inline assembly statements, which use the Intel dialect. If we ever support more dialects we'll need to add additional state to the attribute. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161641 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r161633-161634 "Partition use lists so defs always come before uses."Jakob Stoklund Olesen2012-08-09
| | | | | | These commits broke a number of buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161640 91177308-0d34-0410-b5e6-96231b3b80d8
* Partition use lists so defs always come before uses.Jakob Stoklund Olesen2012-08-09
| | | | | | | | | | | | | | | | This makes it possible to speed up def_iterator by stopping at the first use. This makes def_empty() and getUniqueVRegDef() much faster when there are many uses. In a +Asserts build, LiveVariables is 100x faster in one case because getVRegDef() has an assertion that would scan to the end of a def_iterator chain. Spill weight calculation is significantly faster (300x in one case) because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP) which calls def_empty(%RIP). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161634 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use pointer-pointers for the register use lists.Jakob Stoklund Olesen2012-08-09
| | | | | | | | | | | Use a more conventional doubly linked list where the Prev pointers form a cycle. This means it is no longer necessary to adjust the Prev pointers when reallocating the VRegInfo array. The test changes are required because the register allocation hint is using the use-list order to break ties. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161633 91177308-0d34-0410-b5e6-96231b3b80d8
* Move use list management into MachineRegisterInfo.Jakob Stoklund Olesen2012-08-09
| | | | | | | | | | | | | | Register MachineOperands are kept in linked lists accessible via MRI's reg_iterator interfaces. The linked list management was handled partly by MachineOperand methods, partly by MRI methods. Move all of the list management into MRI, delete MO::AddRegOperandToRegInfo() and MO::RemoveRegOperandFromRegInfo(). Be more explicit about handling the cases where an MRI pointer isn't available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161632 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Extend the MC AsmParser API to match MCInsts (but not emit).Chad Rosier2012-08-09
| | | | | | | | | | This new API will be used by clang to parse ms-style inline asms. One goal of this project is to use this style of inline asm for targets other then x86. Therefore, this API needs to be implemented for non-x86 targets at some point in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161624 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineRegisterInfo was already a friend of MachineOperand, and GCC complainsMatt Beaumont-Gay2012-08-09
| | | | | | about repeated friending. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161553 91177308-0d34-0410-b5e6-96231b3b80d8
* Move [SU]LEB128 encoding to a utility header.Jim Grosbach2012-08-08
| | | | | | | These functions are very generic. There's no reason for them to be tied to MCObjectWriter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161545 91177308-0d34-0410-b5e6-96231b3b80d8
* Move getNextOperandForReg() into MachineRegisterInfo.Jakob Stoklund Olesen2012-08-08
| | | | | | | MRI provides iterators for traversing the use-def chains. They should not be accessible from anywhere else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161543 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow legalization of target-specific SDNodes, provided that the target ↵Owen Anderson2012-08-08
| | | | | | itself provide a legalization hook for them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161536 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove OpenBSD defines:Bill Wendling2012-08-08
| | | | | | | | | | - The defines are in stddint.h, which is #include'd already. - The block wasn't used anyway, since it was _OpenBSD_, and not __OpenBSD__ Patch by David Hill! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161515 91177308-0d34-0410-b5e6-96231b3b80d8
* Added MispredictPenalty to SchedMachineModel.Andrew Trick2012-08-08
| | | | | | | This replaces an existing subtarget hook on ARM and allows standard CodeGen passes to potentially use the property. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161471 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor cleanup of defaultDefLatency APIAndrew Trick2012-08-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161470 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Fix a quadratic algorithm in MachineBranchProbabilityInfo."Jakob Stoklund Olesen2012-08-08
| | | | | | It caused an assertion failure when compiling consumer-typeset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161463 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a quadratic algorithm in MachineBranchProbabilityInfo.Jakob Stoklund Olesen2012-08-08
| | | | | | | | The getSumForBlock function was quadratic in the number of successors because getSuccWeight would perform a linear search for an already known iterator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161460 91177308-0d34-0410-b5e6-96231b3b80d8
* Add SelectionDAG::getTargetIndex.Jakob Stoklund Olesen2012-08-07
| | | | | | | This adds support for TargetIndex operands during isel. The meaning of these (index, offset, flags) operands is entirely defined by the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161453 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-18 22:16:05 +0000