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path: root/lib/CodeGen/AllocationOrder.h
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* Check hint registers for interference only once before evictionsAditya Nandakumar2013-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196536 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Give internal classes hidden visibility."Benjamin Kramer2013-09-11
| | | | | | | It works with clang, but GCC has different rules so we can't make all of those hidden. This reverts commit r190534. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190536 91177308-0d34-0410-b5e6-96231b3b80d8
* Give internal classes hidden visibility.Benjamin Kramer2013-09-11
| | | | | | Worth 100k on a linux/x86_64 Release+Asserts clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190534 91177308-0d34-0410-b5e6-96231b3b80d8
* Limit the search space in RAGreedy::tryEvict().Jakob Stoklund Olesen2013-01-12
| | | | | | | When tryEvict() is looking for a cheaper register in the allocation order, skip the tail of too expensive registers when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172281 91177308-0d34-0410-b5e6-96231b3b80d8
* Speed up the AllocationOrder class a bit.Jakob Stoklund Olesen2012-12-04
| | | | | | | Allow the central functions to be inlined, and use the argumentless isHint() function when possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169319 91177308-0d34-0410-b5e6-96231b3b80d8
* Sort includes for all of the .h files under the 'lib' tree. These wereChandler Carruth2012-12-04
| | | | | | | | | | missed in the first pass because the script didn't yet handle include guards. Note that the script is now able to handle all of these headers without manual edits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the new getRegAllocationHints() hook from AllocationOrder.Jakob Stoklund Olesen2012-12-03
| | | | | | | This simplifies the hinting code quite a bit while making the targets easier to write at the same time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169173 91177308-0d34-0410-b5e6-96231b3b80d8
* Use MCPhysReg for RegisterClassInfo allocation orders.Jakob Stoklund Olesen2012-11-29
| | | | | | This saves a bit of memory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168852 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix old doxygen comment.Jakob Stoklund Olesen2012-01-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148825 91177308-0d34-0410-b5e6-96231b3b80d8
* Get allocation orders from RegisterClassInfo when possible.Jakob Stoklund Olesen2011-06-06
| | | | | | | | | | | | Only target-dependent hints require callbacks. The RCI allocation order has CSR aliases last according to their order of appearance in the getCalleeSavedRegs list. This can depend on the calling convention. This way, AllocationOrder::next doesn't have to check for reserved registers, and CSRs are always allocated last, even with weird calling conventions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132690 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch AllocationOrder to using RegisterClassInfo instead of a BitVectorJakob Stoklund Olesen2011-06-03
| | | | | | | | | of reserved registers. Use RegisterClassInfo in RABasic as well. This slightly changes som allocation orders because RegisterClassInfo puts CSR aliases last. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132581 91177308-0d34-0410-b5e6-96231b3b80d8
* Try harder to get the hint by preferring to evict hint interference.Jakob Stoklund Olesen2011-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126463 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an AllocationOrder class that can iterate over the allocatable physicalJakob Stoklund Olesen2010-12-10
registers for a given virtual register. Reserved registers are filtered from the allocation order, and any valid hint is returned as the first suggestion. For target dependent hints, a number of arcane target hooks are invoked. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121497 91177308-0d34-0410-b5e6-96231b3b80d8
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