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path: root/lib/CodeGen/LiveDebugVariables.cpp
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* This reapplies r207235 with an additional bugfixes caught by the msanAdrian Prantl2014-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | buildbot - do not insert debug intrinsics before phi nodes. Debug info for optimized code: Support variables that are on the stack and described by DBG_VALUEs during their lifetime. Previously, when a variable was at a FrameIndex for any part of its lifetime, this would shadow all other DBG_VALUEs and only a single fbreg location would be emitted, which in fact is only valid for a small range and not the entire lexical scope of the variable. The included dbg-value-const-byref testcase demonstrates this. This patch fixes this by Local - emitting dbg.value intrinsics for allocas that are passed by reference - dropping all dbg.declares (they are now fully lowered to dbg.values) SelectionDAG - renamed constructors for SDDbgValue for better readability. - fix UserValue::match() to handle indirect values correctly - not inserting an MMI table entries for dbg.values that describe allocas. - lowering dbg.values that describe allocas into *indirect* DBG_VALUEs. CodeGenPrepare - leaving dbg.values for an alloca were they are (see comment) Other - regenerated/updated instcombine.ll testcase and included source rdar://problem/16679879 http://reviews.llvm.org/D3374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207269 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "This reapplies r207130 with an additional testcase+and a missing ↵Adrian Prantl2014-04-25
| | | | | | | | check for" This reverts commit 207235 to investigate msan buildbot breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207250 91177308-0d34-0410-b5e6-96231b3b80d8
* This reapplies r207130 with an additional testcase+and a missing check forAdrian Prantl2014-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AllocaInst that was missing in one location. Debug info for optimized code: Support variables that are on the stack and described by DBG_VALUEs during their lifetime. Previously, when a variable was at a FrameIndex for any part of its lifetime, this would shadow all other DBG_VALUEs and only a single fbreg location would be emitted, which in fact is only valid for a small range and not the entire lexical scope of the variable. The included dbg-value-const-byref testcase demonstrates this. This patch fixes this by Local - emitting dbg.value intrinsics for allocas that are passed by reference - dropping all dbg.declares (they are now fully lowered to dbg.values) SelectionDAG - renamed constructors for SDDbgValue for better readability. - fix UserValue::match() to handle indirect values correctly - not inserting an MMI table entries for dbg.values that describe allocas. - lowering dbg.values that describe allocas into *indirect* DBG_VALUEs. CodeGenPrepare - leaving dbg.values for an alloca were they are (see comment) Other - regenerated/updated instcombine.ll testcase and included source rdar://problem/16679879 http://reviews.llvm.org/D3374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207235 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "This reapplies r207130 with an additional testcase+and a missing ↵Adrian Prantl2014-04-25
| | | | | | | | check for" Typo in testcase. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207166 91177308-0d34-0410-b5e6-96231b3b80d8
* This reapplies r207130 with an additional testcase+and a missing check forAdrian Prantl2014-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AllocaInst that was missing in one location. Debug info for optimized code: Support variables that are on the stack and described by DBG_VALUEs during their lifetime. Previously, when a variable was at a FrameIndex for any part of its lifetime, this would shadow all other DBG_VALUEs and only a single fbreg location would be emitted, which in fact is only valid for a small range and not the entire lexical scope of the variable. The included dbg-value-const-byref testcase demonstrates this. This patch fixes this by Local - emitting dbg.value intrinsics for allocas that are passed by reference - dropping all dbg.declares (they are now fully lowered to dbg.values) SelectionDAG - renamed constructors for SDDbgValue for better readability. - fix UserValue::match() to handle indirect values correctly - not inserting an MMI table entries for dbg.values that describe allocas. - lowering dbg.values that describe allocas into *indirect* DBG_VALUEs. CodeGenPrepare - leaving dbg.values for an alloca were they are (see comment) Other - regenerated/updated instcombine.ll testcase and included source rdar://problem/16679879 http://reviews.llvm.org/D3374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207165 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Debug info for optimized code: Support variables that are on the ↵Adrian Prantl2014-04-25
| | | | | | | | stack and" This reverts commit 207130 for buildbot breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207162 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info for optimized code: Support variables that are on the stack andAdrian Prantl2014-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | described by DBG_VALUEs during their lifetime. Previously, when a variable was at a FrameIndex for any part of its lifetime, this would shadow all other DBG_VALUEs and only a single fbreg location would be emitted, which in fact is only valid for a small range and not the entire lexical scope of the variable. The included dbg-value-const-byref testcase demonstrates this. This patch fixes this by Local - emitting dbg.value intrinsics for allocas that are passed by reference - dropping all dbg.declares (they are now fully lowered to dbg.values) SelectionDAG - renamed constructors for SDDbgValue for better readability. - fix UserValue::match() to handle indirect values correctly - not inserting an MMI table entries for dbg.values that describe allocas. - lowering dbg.values that describe allocas into *indirect* DBG_VALUEs. CodeGenPrepare - leaving dbg.values for an alloca were they are (see comment) Other - regenerated/updated instcombine-intrinsics testcase and included source rdar://problem/16679879 http://reviews.llvm.org/D3374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207130 91177308-0d34-0410-b5e6-96231b3b80d8
* [Modules] Remove potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-22
| | | | | | | | | | | | define below all header includes in the lib/CodeGen/... tree. While the current modules implementation doesn't check for this kind of ODR violation yet, it is likely to grow support for it in the future. It also removes one layer of macro pollution across all the included headers. Other sub-trees will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206837 91177308-0d34-0410-b5e6-96231b3b80d8
* Use unique_ptr to handle ownership of UserValues in LiveDebugVariablesImplDavid Blaikie2014-04-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206785 91177308-0d34-0410-b5e6-96231b3b80d8
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper2014-04-14
| | | | | | instead of comparing to nullptr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206142 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch a number of loops in lib/CodeGen over to range-based for-loops, now thatOwen Anderson2014-03-17
| | | | | | | the MachineRegisterInfo iterators are compatible with it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204075 91177308-0d34-0410-b5e6-96231b3b80d8
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-13
| | | | | | | | | | | operator* on the by-operand iterators to return a MachineOperand& rather than a MachineInstr&. At this point they almost behave like normal iterators! Again, this requires making some existing loops more verbose, but should pave the way for the big range-based for-loop cleanups in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203865 91177308-0d34-0410-b5e6-96231b3b80d8
* [Layering] Move DebugInfo.h into the IR library where its implementationChandler Carruth2014-03-06
| | | | | | already lives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203046 91177308-0d34-0410-b5e6-96231b3b80d8
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-02
| | | | | | Remove the old functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202636 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove capability for polymorphic destruction from LexicalScopeEric Christopher2013-11-20
| | | | | | and LexicalScopes, we're not using it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195182 91177308-0d34-0410-b5e6-96231b3b80d8
* Grammar.Eric Christopher2013-11-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195181 91177308-0d34-0410-b5e6-96231b3b80d8
* Represent RegUnit liveness with LiveRange instanceMatthias Braun2013-10-10
| | | | | | | Previously LiveInterval has been used, but having a spill weight and register number is unnecessary for a register unit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192397 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename LiveRange to LiveInterval::SegmentMatthias Braun2013-10-10
| | | | | | | | The Segment struct contains a single interval; multiple instances of this struct are used to construct a live range, but the struct is not a live range by itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192392 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info: Fix PR16736 and rdar://problem/14990587.Adrian Prantl2013-09-16
| | | | | | | A DBG_VALUE is register-indirect iff the first operand is a register _and_ the second operand is an immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190821 91177308-0d34-0410-b5e6-96231b3b80d8
* Track new virtual registers by register number.Mark Lacey2013-08-14
| | | | | | | | | | Track new virtual registers by register number, rather than by the live interval created for them. This is the first step in separating the creation of new virtual registers and new live intervals. Eventually live intervals will be created and populated on demand after the virtual registers have been created and used in instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188434 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply an improved version of r180816/180817.Adrian Prantl2013-07-09
| | | | | | | | | | | | | | | Change the informal convention of DBG_VALUE machine instructions so that we can express a register-indirect address with an offset of 0. The old convention was that a DBG_VALUE is a register-indirect value if the offset (operand 1) is nonzero. The new convention is that a DBG_VALUE is register-indirect if the first operand is a register and the second operand is an immediate. For plain register values the combination reg, reg is used. MachineInstrBuilder::BuildMI knows how to build the new DBG_VALUES. rdar://problem/13658587 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185966 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: Simplify Frame Index handling in DBG_VALUE Machine InstructionsDavid Blaikie2013-06-16
| | | | | | | | | | | | | | | | | | | | Rather than using the full power of target-specific addressing modes in DBG_VALUEs with Frame Indicies, simply use Frame Index + Offset. This reduces the complexity of debug info handling down to two representations of values (reg+offset and frame index+offset) rather than three or four. Ideally we could ensure that frame indicies had been eliminated by the time we reached an assembly or dwarf generation, but I haven't spent the time to figure out where the FIs are leaking through into that & whether there's a good place to convert them. Some FI+offset=>reg+offset conversion is done (see PrologEpilogInserter, for example) which is necessary for some SelectionDAG assumptions about registers, I believe, but it might be possible to make this a more thorough conversion & ensure there are no remaining FIs no matter how instruction selection is performed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184066 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert "Change the informal convention of DBG_VALUE so that we ↵Adrian Prantl2013-04-30
| | | | | | | | | | can express a" because it breaks some buildbots. This reverts commit 180816. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180819 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the informal convention of DBG_VALUE so that we can express aAdrian Prantl2013-04-30
| | | | | | | | | | | | register-indirect address with an offset of 0. It used to be that a DBG_VALUE is a register-indirect value if the offset (operand 1) is nonzero. The new convention is that a DBG_VALUE is register-indirect if the first operand is a register and the second operand is an immediate. For plain registers use the combination reg, reg. rdar://problem/13658587 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180816 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up LDV, no functionality change.Manman Ren2013-02-13
| | | | | | | | | Remove dead functions: renameRegister Move private member variables from LDV to Impl Remove ssp/uwtable from testing case git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175072 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment.Eric Christopher2013-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175024 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: LiveDebugVarible can remove DBG_VALUEs, make sure we emit them back.Manman Ren2013-02-13
| | | | | | | | | | | | | | | RegisterCoalescer used to depend on LiveDebugVariable. LDV removes DBG_VALUEs without emitting them at the end. We fix this by removing LDV from RegisterCoalescer. Also add an assertion to make sure we call emitDebugValues if DBG_VALUEs are removed at runOnMachineFunction. rdar://problem/13183203 Reviewed by Andy & Jakob git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175023 91177308-0d34-0410-b5e6-96231b3b80d8
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-02
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-03
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the LiveRegMatrix analysis available to targets.Jakob Stoklund Olesen2012-11-28
| | | | | | | | | | | No functional change, just moved header files. Targets can inject custom passes between register allocation and rewriting. This makes it possible to tweak the register allocation before rewriting, using the full global interference checking available from LiveRegMatrix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168806 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up a few more uses of MF.getFunction()->getName().David Blaikie2012-08-22
| | | | | | | | Based on CR feedback from r162301 and Craig Topper's refactoring in r162347 here are a few other places that could use the same API (& in one instance drop a Function.h dependency). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162367 91177308-0d34-0410-b5e6-96231b3b80d8
* Move lib/Analysis/DebugInfo.cpp to lib/VMCore/DebugInfo.cpp andBill Wendling2012-06-28
| | | | | | | | | | include/llvm/Analysis/DebugInfo.h to include/llvm/DebugInfo.h. The reasoning is because the DebugInfo module is simply an interface to the debug info MDNodes and has nothing to do with analysis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159312 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't depend on live ranges being present.Jakob Stoklund Olesen2012-06-22
| | | | | | | DBG_VALUE instructions could be referring to non-existing virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159020 91177308-0d34-0410-b5e6-96231b3b80d8
* Use regunit liveness to guide LiveDebugVariables.Jakob Stoklund Olesen2012-06-22
| | | | | | This should produce the same results as using physreg liveness directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159009 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle NewReg==OldReg in renameRegister().Jakob Stoklund Olesen2012-05-15
| | | | | | | This can happen when widening a virtual register to a super-register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156867 91177308-0d34-0410-b5e6-96231b3b80d8
* Tabs.Eric Christopher2012-03-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152842 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Eric Christopher2012-03-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152841 91177308-0d34-0410-b5e6-96231b3b80d8
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-07
| | | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename SlotIndexes to match how they are used.Jakob Stoklund Olesen2011-11-13
| | | | | | | | | | | | | | | | | | | | The old naming scheme (load/use/def/store) can be traced back to an old linear scan article, but the names don't match how slots are actually used. The load and store slots are not needed after the deferred spill code insertion framework was deleted. The use and def slots don't make any sense because we are using half-open intervals as is customary in C code, but the names suggest closed intervals. In reality, these slots were used to distinguish early-clobber defs from normal defs. The new naming scheme also has 4 slots, but the names match how the slots are really used. This is a purely mechanical renaming, but some of the code makes a lot more sense now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144503 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop tracking spill slot uses in VirtRegMap.Jakob Stoklund Olesen2011-11-13
| | | | | | | Nobody cared, StackSlotColoring scans the instructions to find used stack slots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144485 91177308-0d34-0410-b5e6-96231b3b80d8
* Namespacify.Benjamin Kramer2011-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139892 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a cache to maintain list of machine basic blocks for a given UserValue.Devang Patel2011-09-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139616 91177308-0d34-0410-b5e6-96231b3b80d8
* While extending definition range of a debug variable, consult lexical scopes ↵Devang Patel2011-08-10
| | | | | | also. There is no point extending debug variable out side its lexical block. This provides 6x compile time speedup in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137250 91177308-0d34-0410-b5e6-96231b3b80d8
* Print variable's inline location in debug output.Devang Patel2011-08-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137096 91177308-0d34-0410-b5e6-96231b3b80d8
* Increment counter inside insertDebugValue().Devang Patel2011-08-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136915 91177308-0d34-0410-b5e6-96231b3b80d8
* Add counter.Devang Patel2011-08-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136901 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly handle multiple DBG_VALUE instructions at the same SlotIndex.Jakob Stoklund Olesen2011-08-03
| | | | | | | | | | | | It is possible to have multiple DBG_VALUEs for the same variable: 32L TEST32rr %vreg0<kill>, %vreg0, %EFLAGS<imp-def>; GR32:%vreg0 DBG_VALUE 2, 0, !"i" DBG_VALUE %noreg, %0, !"i" When that happens, keep the last one instead of the first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136842 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Devang Patel2011-07-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134559 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove an assertion to fix PR9872.Jakob Stoklund Olesen2011-05-08
| | | | | | | | | | | | | | | | | | | | It can happen that a live debug variable is the last use of a sub-register, and the register allocator will pick a larger register class for the virtual register. If the allocated register doesn't support the sub-register index, just use %noreg for the debug variables instead of asserting. In PR9872, a debug variable ends up in the sub_8bit_hi part of a GR32_ABCD register. The register is split and one part is inflated to GR32 and assigned %ESI because there are no more normal uses of sub_8bit_hi. Since %ESI doesn't have that sub-register, substPhysReg asserted. Now it will simply insert a %noreg instead, and the debug variable will be marked unavailable in that range. We don't currently have a way of saying: !"value" is in bits 8-15 of %ESI, I don't know if DWARF even supports that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131073 91177308-0d34-0410-b5e6-96231b3b80d8
* Iterate backwards over debug locations when splitting them so they can be ↵Jakob Stoklund Olesen2011-05-06
| | | | | | | | safely erased. This should unbreak dragonegg-i386-linux and build-self-4-mingw32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131007 91177308-0d34-0410-b5e6-96231b3b80d8
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