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path: root/lib/CodeGen/MachineScheduler.cpp
Commit message (Expand)AuthorAge
* Silence GCC warning about falling off the end of a non-void function.Benjamin Kramer2012-11-09
* misched: Heuristics based on the machine model.Andrew Trick2012-11-07
* misched: Rename RemainingCount to avoid confusion with remaining resources.Andrew Trick2012-11-06
* misched: Added handleMove support for updating all kill flags, not just for a...Andrew Trick2012-10-16
* misched: ILP scheduler for experimental heuristics.Andrew Trick2012-10-15
* misched: Use the TargetSchedModel interface wherever possible.Andrew Trick2012-10-10
* misched: avoid scheduling an instruction twice.Andrew Trick2012-10-08
* misched: add a hook for custom DAG postprocessing.Andrew Trick2012-09-14
* Release build: guard dump functions withManman Ren2012-09-11
* Reorganize MachineScheduler interfaces and publish them in the header.Andrew Trick2012-09-11
* Release build: guard dump functions with "ifndef NDEBUG"Manman Ren2012-09-06
* Simplify the computeOperandLatency API.Andrew Trick2012-08-23
* Add a getName function to MachineFunction. Use it in places that previously d...Craig Topper2012-08-22
* Fix a typo (the the => the)Sylvestre Ledru2012-07-23
* I'm introducing a new machine model to simultaneously allow simpleAndrew Trick2012-07-07
* misched: allow NULL InstrItineraries.Andrew Trick2012-07-02
* misched: avoid scheduling instructions that can't be dispatched.Andrew Trick2012-06-29
* misched: count micro-ops toward the issue limit.Andrew Trick2012-06-29
* Guard private fields that are unused in Release builds with #ifndef NDEBUG.Benjamin Kramer2012-06-16
* Move RegisterClassInfo.h.Andrew Trick2012-06-06
* Move RegisterPressure.h.Andrew Trick2012-06-06
* misched: API for minimum vs. expected latency.Andrew Trick2012-06-05
* misched: comments from code review.Andrew Trick2012-06-05
* misched: trace formattingAndrew Trick2012-05-25
* Silence unused variable warnings from when assertions are disabled.Kaelyn Uhrain2012-05-24
* misched: Use the same scheduling heuristics with -misched-topdown/bottomup.Andrew Trick2012-05-24
* misched: Trace regpressure.Andrew Trick2012-05-24
* misched: Give each ReadyQ a unique IDAndrew Trick2012-05-24
* misched: Added ScoreboardHazardRecognizer.Andrew Trick2012-05-24
* misched: Release bottom roots in reverse order.Andrew Trick2012-05-24
* misched: rename ReadyQ classAndrew Trick2012-05-24
* misched: copy comments so compareRPDelta is readable by itself.Andrew Trick2012-05-24
* commentsAndrew Trick2012-05-17
* misched: trace ReadyQ.Andrew Trick2012-05-17
* misched: Added 3-level regpressure back-off.Andrew Trick2012-05-17
* commentAndrew Trick2012-05-17
* misched: fix liveness iteratorsAndrew Trick2012-05-17
* misched: Print machineinstrs with -debug-only=mischedAndrew Trick2012-05-10
* misched: tracing register pressure heuristics.Andrew Trick2012-05-10
* misched: Add register pressure backoff to ConvergingScheduler.Andrew Trick2012-05-10
* misched: Release only unscheduled nodes into ReadyQ.Andrew Trick2012-05-10
* misched: Added ReadyQ container wrapper for Top and Bottom Queues.Andrew Trick2012-05-10
* misched: Introducing Top and Bottom register pressure trackers during schedul...Andrew Trick2012-05-10
* Fix a naughty header include that breaks "installed" builds.Andrew Trick2012-04-24
* misched: try (not too hard) to place debug values where they belongAndrew Trick2012-04-24
* misched: ignore debug values during schedulingAndrew Trick2012-04-24
* misched: DAG builder support for tracking register pressure within the curren...Andrew Trick2012-04-24
* misched: Add finalizeScheduler to complete the target interface.Andrew Trick2012-04-01
* misched: trace LiveIntervals after scheduling.Andrew Trick2012-03-21
* misched: obvious iterator update fixes for bottom-up.Andrew Trick2012-03-21