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path: root/lib/CodeGen/PostRASchedulerList.cpp
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* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach antidependency breakers to use RegisterClassInfo.Jakob Stoklund Olesen2011-06-16
| | | | | | No functional change was intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133202 91177308-0d34-0410-b5e6-96231b3b80d8
* Update DBG_VALUEs while breaking anti dependencies.Devang Patel2011-06-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132487 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an issue width check to the postRA scheduler. Patch by Max Kazakov!Andrew Trick2011-06-01
| | | | | | | | | | | For targets with no itinerary (x86) it is a nop by default. For targets with issue width already expressed in the itinerary (ARM) it bypasses a scoreboard check but otherwise does not affect the schedule. It does make the code more consistent and complete and allows new targets to specify their issue width in an arbitrary way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132385 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo: Reviewed by Alistair.Andrew Trick2011-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131001 91177308-0d34-0410-b5e6-96231b3b80d8
* Post-RA scheduler compile time fix. Quadratic computation of DAG node depth.Andrew Trick2011-05-06
| | | | | | | | | | | | The post-ra scheduler was explicitly updating the depth of a node's successors after scheduling it, regardless of whether the successor was ready. This is quadratic for DAGs with transitively redundant edges. I simply removed the useless update of depth, which is lazilly computed later. Fixes <rdar://problem/9044332> compiler takes way too long to build TextInput. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130992 91177308-0d34-0410-b5e6-96231b3b80d8
* Various bits of framework needed for precise machine-level selectionAndrew Trick2010-12-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | DAG scheduling during isel. Most new functionality is currently guarded by -enable-sched-cycles and -enable-sched-hazard. Added InstrItineraryData::IssueWidth field, currently derived from ARM itineraries, but could be initialized differently on other targets. Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is active, and if so how many cycles of state it holds. Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry into the scheduler's available queue. ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to get information about it's SUnits, provides RecedeCycle for bottom-up scheduling, correctly computes scoreboard depth, tracks IssueCount, and considers potential stall cycles when checking for hazards. ScheduleDAGRRList now models machine cycles and hazards (under flags). It tracks MinAvailableCycle, drives the hazard recognizer and priority queue's ready filter, manages a new PendingQueue, properly accounts for stall cycles, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122541 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng2010-09-10
| | | | | | | | | | | | take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r110396 to fix buildbots.Owen Anderson2010-08-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-05
| | | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
* Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.Bill Wendling2010-07-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108450 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow ARM if-converter to be run after post allocation scheduling.Evan Cheng2010-06-18
| | | | | | | | | | | | | | | | | - This fixed a number of bugs in if-converter, tail merging, and post-allocation scheduler. If-converter now runs branch folding / tail merging first to maximize if-conversion opportunities. - Also changed the t2IT instruction slightly. It now defines the ITSTATE register which is read by instructions in the IT block. - Added Thumb2 specific hazard recognizer to ensure the scheduler doesn't change the instruction ordering in the IT block (since IT mask has been finalized). It also ensures no other instructions can be scheduled between instructions in the IT block. This is not yet enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106344 91177308-0d34-0410-b5e6-96231b3b80d8
* - Do away with SimpleHazardRecognizer.h. It's not used and offers little value.Evan Cheng2010-06-14
| | | | | | | - Rename ExactHazardRecognizer to PostRAHazardRecognizer and move its header to include to allow targets to extend it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105959 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow target to provide its own hazard recognizer to post-ra scheduler.Evan Cheng2010-06-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105862 91177308-0d34-0410-b5e6-96231b3b80d8
* - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng2010-05-21
| | | | | | | | | | | that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dbg_value workaround and associated command line optionJim Grosbach2010-05-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104254 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable preserving debug information through post-RA schedulingJim Grosbach2010-05-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104175 91177308-0d34-0410-b5e6-96231b3b80d8
* 80 column and trailing whitespace cleanupJim Grosbach2010-05-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103806 91177308-0d34-0410-b5e6-96231b3b80d8
* add cmd line option to leave dbgvalues in during post-RA sceduling. UsefulJim Grosbach2010-05-14
| | | | | | while debugging what's mishandled about them in the post-RA pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103805 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-01
| | | | | | | changes before doing phi lowering for switches. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102809 91177308-0d34-0410-b5e6-96231b3b80d8
* As a temporary workaround for post-RA not handling DebugValue instructions,Bob Wilson2010-04-17
| | | | | | | | just remove them all. Radar 7873207 (working around the root problem of Radar 7759363). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101604 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a #include.Dan Gohman2010-04-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101043 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some more places where dbg_value affected codegen.Dale Johannesen2010-03-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97765 91177308-0d34-0410-b5e6-96231b3b80d8
* Change errs() to dbgs().David Greene2010-01-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92594 91177308-0d34-0410-b5e6-96231b3b80d8
* <rdar://problem/7453528>. Track only physical registers that are valid for ↵David Goodwin2009-12-09
| | | | | | the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90970 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't hang on to pointers or references after vector::push_back.Jakob Stoklund Olesen2009-12-03
| | | | | | | The MO reference to a MachineOperand can be invalidated by MachineInstr::addOperand. Don't even use it for debugging. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90381 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some old experimental code that is no longer needed. Remove ↵David Goodwin2009-11-20
| | | | | | additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89471 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow target to specify regclass for which antideps will only be broken ↵David Goodwin2009-11-13
| | | | | | along the critical path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88682 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename registers to break output dependencies in addition to anti-dependencies.David Goodwin2009-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@87015 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed to address code review. No functional changes.David Goodwin2009-11-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86634 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow targets to specify register classes whose member registers should not ↵David Goodwin2009-11-10
| | | | | | be renamed to break anti-dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86628 91177308-0d34-0410-b5e6-96231b3b80d8
* Break anti-dependencies using free registers in a round-robin manner to ↵David Goodwin2009-11-05
| | | | | | avoid introducing new anti-dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86098 91177308-0d34-0410-b5e6-96231b3b80d8
* Do a scheduling pass ignoring anti-dependencies to identify candidate ↵David Goodwin2009-11-03
| | | | | | registers that should be renamed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85939 91177308-0d34-0410-b5e6-96231b3b80d8
* Make -print-machineinstrs more readable.Dan Gohman2009-10-31
| | | | | | | | | | | | | | | - Be consistent when referring to MachineBasicBlocks: BB#0. - Be consistent when referring to virtual registers: %reg1024. - Be consistent when referring to unknown physical registers: %physreg10. - Be consistent when referring to known physical registers: %RAX - Be consistent when referring to register 0: %reg0 - Be consistent when printing alignments: align=16 - Print jump table contents. - Don't print host addresses, in general. - and various other cleanups. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85682 91177308-0d34-0410-b5e6-96231b3b80d8
* Make AntiDepReg.h internal.David Goodwin2009-10-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85412 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow the aggressive anti-dep breaker to process the same region multiple ↵David Goodwin2009-10-26
| | | | | | times. This is necessary because new anti-dependencies are exposed when "current" ones are broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85166 91177308-0d34-0410-b5e6-96231b3b80d8
* Define virtual destructor in *.cpp file.David Goodwin2009-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85146 91177308-0d34-0410-b5e6-96231b3b80d8
* Add aggressive anti-dependence breaker. Currently it is not the default for ↵David Goodwin2009-10-26
| | | | | | any target. Enable with -break-anti-dependencies=all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85145 91177308-0d34-0410-b5e6-96231b3b80d8
* Break anti-dependence breaking out into its own class.David Goodwin2009-10-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85127 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-25
| | | | | | | VISIBILITY_HIDDEN removal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-25
| | | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow the target to select the level of anti-dependence breaking that should ↵David Goodwin2009-10-22
| | | | | | be performed by the post-RA scheduler. The default is none. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84911 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r84658 and r84691. They were causing llvm-gcc bootstrap to fail.Dan Gohman2009-10-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84727 91177308-0d34-0410-b5e6-96231b3b80d8
* Respect src register allocation requirements when breaking ↵David Goodwin2009-10-20
| | | | | | anti-dependencies. Remove some dead code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84691 91177308-0d34-0410-b5e6-96231b3b80d8
* Checkpoint more aggressive anti-dependency breaking for post-ra scheduler.David Goodwin2009-10-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84658 91177308-0d34-0410-b5e6-96231b3b80d8
* Change createPostRAScheduler so it can be turned off at llc -O1.Evan Cheng2009-10-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84273 91177308-0d34-0410-b5e6-96231b3b80d8
* If post-alloc scheduler is not enabled, it should return false, not true.Evan Cheng2009-10-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84248 91177308-0d34-0410-b5e6-96231b3b80d8
* Add debugging output.David Goodwin2009-10-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84011 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a missing initialization of PostRAScheduler's AA member.Dan Gohman2009-10-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83695 91177308-0d34-0410-b5e6-96231b3b80d8
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