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path: root/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
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* rename MVT::Flag to MVT::Glue. "Flag" is a terrible name forChris Lattner2010-12-21
* Two sets of changes. Sorry they are intermingled.Evan Cheng2010-11-03
* Avoiding overly aggressive latency scheduling. If the two nodes share anEvan Cheng2010-10-29
* Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.Evan Cheng2010-10-28
* Revert 117518 and 117519 for now. They changed scheduling and cause MC tests ...Evan Cheng2010-10-28
* Fix a major bug in operand latency computation. The use index must be adjustedEvan Cheng2010-10-28
* - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. ThisEvan Cheng2010-10-06
* Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC, CMN, MVN, or CMPEvan Cheng2010-09-29
* Teach if-converter to be more careful with predicating instructions that wouldEvan Cheng2010-09-10
* Add missing null check reported by Amaury Pouly.Evan Cheng2010-08-10
* Fix a bug in the code which re-inserts DBG_VALUE nodes after scheduling;Dan Gohman2010-07-10
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-10
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-09
* Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emittingDan Gohman2010-07-09
* grammar tweak in comment.Jim Grosbach2010-06-30
* Add a VT argument to getMinimalPhysRegClass and replace the copy related usesRafael Espindola2010-06-29
* Remove variables which are assigned to but for which the valueDuncan Sands2010-06-25
* It's possible that a flag is added to the SDNode that points back to theBill Wendling2010-06-24
* MorphNodeTo doesn't preserve the memory operands. Because we're morphing a nodeBill Wendling2010-06-23
* Use A.append(...) instead of A.insert(A.end(), ...) when A is aDan Gohman2010-06-21
* Code refactoring, no functionality changes.Evan Cheng2010-06-10
* Fix some latency computation bugs: if the use is not a machine opcode do not ...Evan Cheng2010-05-28
* Allow targets more controls on what nodes are scheduled by reg pressure, what...Evan Cheng2010-05-20
* Add a hybrid bottom up scheduler that reduce register usage while avoidingEvan Cheng2010-05-20
* Code clean up.Evan Cheng2010-05-19
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-01
* EmitDbgValue doesn't need its EdgeMapping argument.Dan Gohman2010-04-30
* Add DBG_VALUE handling for byval parameters; thisDale Johannesen2010-04-26
* - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo an...Evan Cheng2010-04-26
* Fix -Wcast-qual warnings.Dan Gohman2010-04-17
* Scheduler assumes SDDbgValue nodes are in source order. That's true currently...Evan Cheng2010-03-25
* Remove a fixme that doesn't make sense any more.Evan Cheng2010-03-25
* Change how dbg_value sdnodes are converted into machine instructions. Their p...Evan Cheng2010-03-25
* Rename SDDbgValue.h to SDNodeDbgValue.h for consistency.Evan Cheng2010-03-14
* Progress towards shepherding debug info through SelectionDAG.Dale Johannesen2010-03-10
* Change the scheduler from adding nodes in allnodes orderChris Lattner2010-02-24
* Enable pre-regalloc scheduling load clustering by default.Evan Cheng2010-01-22
* Teach pre-regalloc scheduler to schedule loads from nearby addresses. It may ...Evan Cheng2010-01-22
* Change errs() to dbgs().David Greene2010-01-05
* Changes from review:Bill Wendling2009-12-18
* Reapply r91392, it was only unmasking the bug, and since TOT is still broken ...Daniel Dunbar2009-12-16
* Revert "Initial work on disabling the scheduler. This is a work in progress, andDaniel Dunbar2009-12-16
* Initial work on disabling the scheduler. This is a work in progress, and thisBill Wendling2009-12-15
* Create a new InstrEmitter class for translating SelectionDAG nodesDan Gohman2009-10-10
* The ScheduleDAG framework now requires an AliasAnalysis argument, thoughDan Gohman2009-10-09
* Improve MachineMemOperand handling.Dan Gohman2009-09-25
* Remove some not-really-used variables, as warnedDuncan Sands2009-09-06
* Use the schedule itinerary operand use/def cycle information to adjust depend...David Goodwin2009-08-19
* Add callback to allow target to adjust latency of schedule dependency edge.David Goodwin2009-08-13
* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ...Owen Anderson2009-08-11