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path: root/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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* Lower stackmap intrinsics directly to their target opcode in the DAG builder.Andrew Trick2013-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193769 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace sra with srl if a single sign bit is requiredRichard Sandiford2013-10-17
| | | | | | | E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192884 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle (shl (anyext (shr ...))) in SimpilfyDemandedBitsRichard Sandiford2013-10-16
| | | | | | | | | | | This is really an extension of the current (shl (shr ...)) -> shl optimization. The main difference is that certain upper bits must also not be demanded. The motivating examples are the first two in the testcase, which occur in llvmpipe output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192783 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering: Don't index into empty string.Will Dietz2013-10-13
| | | | | | (This is triggered by current lit tests) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192549 91177308-0d34-0410-b5e6-96231b3b80d8
* Use getPointerSizeInBits() rather than 8 * getPointerSize()Matt Arsenault2013-10-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192386 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG: Try to expand all condition codes using getCCSwappedOperands()Tom Stellard2013-09-28
| | | | | | | | | | | | This is useful for targets like R600, which only support GT, GE, NE, and EQ condition codes as it removes the need to handle unsupported condition codes in target specific code. There are no tests with this commit, but R600 has been updated to take advantage of this new feature, so its existing selectcc tests are now testing the swapped operands path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191601 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing check to SETCC optimization.Eli Friedman2013-09-24
| | | | | | PR17338. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191337 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG: create correct BooleanContent constantsTim Northover2013-09-06
| | | | | | | | | | | | | | | Occasionally DAGCombiner can spot that a SETCC operation is completely redundant and reduce it to "all true" or "all false". If this happens to a vector, the value produced has to take account of what a normal comparison would have produced, which may be an all-1s bitmask. The fix in SelectionDAG.cpp is tested, however, as far as I can see the code in TargetLowering.cpp is possibly unreachable and almost certainly irrelevant when triggered so there are no tests. However, I believe it's still clearly the right change and may save someone else some hassle if it suddenly becomes reachable. So I'm doing it anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190147 91177308-0d34-0410-b5e6-96231b3b80d8
* Update makeLibCall to return both the call and the chain associated with the ↵Michael Gottesman2013-08-13
| | | | | | | | | | | | | | | libcall instead of just the call. This allows us to specify libcalls that return void. LowerCallTo returns a pair with the return value of the call as the first element and the chain associated with the return value as the second element. If we lower a call that has a void return value, LowerCallTo returns an SDValue with a NULL SDNode and the chain for the call. Thus makeLibCall by just returning the first value makes it impossible for you to set up the chain so that the call is not eliminated as dead code. I also updated all references to makeLibCall to reflect the new return type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188300 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove trailing whitespace from SelectionDAG/*.cppStephen Lin2013-07-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185780 91177308-0d34-0410-b5e6-96231b3b80d8
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184642 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering: Clean up method description commentsDavid Majnemer2013-06-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183623 91177308-0d34-0410-b5e6-96231b3b80d8
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-25
| | | | | | | Change SelectionDAG::getXXXNode() interfaces as well as call sites of these functions to pass in SDLoc instead of DebugLoc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombine: Avoid an edge case where it tried to create an i0 type for (x & ↵Benjamin Kramer2013-05-21
| | | | | | | | 0) == 0. Fixes PR16083. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182357 91177308-0d34-0410-b5e6-96231b3b80d8
* Add LLVMContext argument to getSetCCResultTypeMatt Arsenault2013-05-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182180 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombine: Also shrink eq compares where the constant is exactly as large ↵Benjamin Kramer2013-05-16
| | | | | | | | | | | | | as the smaller type. if ((x & 255) == 255) before: movzbl %al, %eax cmpl $255, %eax after: cmpb $-1, %al git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182038 91177308-0d34-0410-b5e6-96231b3b80d8
* Add static cast to unsigned char whenever a character classification ↵Guy Benyei2013-02-12
| | | | | | function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175006 91177308-0d34-0410-b5e6-96231b3b80d8
* Use AttributeSet accessor methods instead of Attribute accessor methods.Bill Wendling2013-01-18
| | | | | | | | Further encapsulation of the Attribute object. Don't allow direct access to the Attribute object as an aggregate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172853 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some accidentaly duplicated code. This needs urgent cleanup :(Benjamin Kramer2013-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172248 91177308-0d34-0410-b5e6-96231b3b80d8
* Split TargetLowering into a CodeGen and a SelectionDAG part.Benjamin Kramer2013-01-11
| | | | | | | | | This fixes some of the cycles between libCodeGen and libSelectionDAG. It's still a complete mess but as long as the edges consist of virtual call it doesn't cause breakage. BasicTTI did static calls and thus broke some build configurations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172246 91177308-0d34-0410-b5e6-96231b3b80d8
* For inline asm:Eric Christopher2013-01-11
| | | | | | | | | | | - recognize string "{memory}" in the MI generation - mark as mayload/maystore when there's a memory clobber constraint. PR14859. Patch by Krzysztof Parzyszek git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172228 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor to expose RTLIB calls to targets.Tim Northover2013-01-09
| | | | | | | | | | fp128 is almost but not quite completely illegal as a type on AArch64. As a result it needs to have a register class (for argument passing mainly), but all operations need to be lowered to runtime calls. Currently there's no way for targets to do this (without duplicating code), as the relevant functions are hidden in SelectionDAG. This patch changes that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171971 91177308-0d34-0410-b5e6-96231b3b80d8
* Add fp128 rtlib function names to LLVMTim Northover2013-01-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171867 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch TargetTransformInfo from an immutable analysis pass that requiresChandler Carruth2013-01-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a TargetMachine to construct (and thus isn't always available), to an analysis group that supports layered implementations much like AliasAnalysis does. This is a pretty massive change, with a few parts that I was unable to easily separate (sorry), so I'll walk through it. The first step of this conversion was to make TargetTransformInfo an analysis group, and to sink the nonce implementations in ScalarTargetTransformInfo and VectorTargetTranformInfo into a NoTargetTransformInfo pass. This allows other passes to add a hard requirement on TTI, and assume they will always get at least on implementation. The TargetTransformInfo analysis group leverages the delegation chaining trick that AliasAnalysis uses, where the base class for the analysis group delegates to the previous analysis *pass*, allowing all but tho NoFoo analysis passes to only implement the parts of the interfaces they support. It also introduces a new trick where each pass in the group retains a pointer to the top-most pass that has been initialized. This allows passes to implement one API in terms of another API and benefit when some other pass above them in the stack has more precise results for the second API. The second step of this conversion is to create a pass that implements the TargetTransformInfo analysis using the target-independent abstractions in the code generator. This replaces the ScalarTargetTransformImpl and VectorTargetTransformImpl classes in lib/Target with a single pass in lib/CodeGen called BasicTargetTransformInfo. This class actually provides most of the TTI functionality, basing it upon the TargetLowering abstraction and other information in the target independent code generator. The third step of the conversion adds support to all TargetMachines to register custom analysis passes. This allows building those passes with access to TargetLowering or other target-specific classes, and it also allows each target to customize the set of analysis passes desired in the pass manager. The baseline LLVMTargetMachine implements this interface to add the BasicTTI pass to the pass manager, and all of the tools that want to support target-aware TTI passes call this routine on whatever target machine they end up with to add the appropriate passes. The fourth step of the conversion created target-specific TTI analysis passes for the X86 and ARM backends. These passes contain the custom logic that was previously in their extensions of the ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces. I separated them into their own file, as now all of the interface bits are private and they just expose a function to create the pass itself. Then I extended these target machines to set up a custom set of analysis passes, first adding BasicTTI as a fallback, and then adding their customized TTI implementations. The fourth step required logic that was shared between the target independent layer and the specific targets to move to a different interface, as they no longer derive from each other. As a consequence, a helper functions were added to TargetLowering representing the common logic needed both in the target implementation and the codegen implementation of the TTI pass. While technically this is the only change that could have been committed separately, it would have been a nightmare to extract. The final step of the conversion was just to delete all the old boilerplate. This got rid of the ScalarTargetTransformInfo and VectorTargetTransformInfo classes, all of the support in all of the targets for producing instances of them, and all of the support in the tools for manually constructing a pass based around them. Now that TTI is a relatively normal analysis group, two things become straightforward. First, we can sink it into lib/Analysis which is a more natural layer for it to live. Second, clients of this interface can depend on it *always* being available which will simplify their code and behavior. These (and other) simplifications will follow in subsequent commits, this one is clearly big enough. Finally, I'm very aware that much of the comments and documentation needs to be updated. As soon as I had this working, and plausibly well commented, I wanted to get it committed and in front of the build bots. I'll be doing a few passes over documentation later if it sticks. Commits to update DragonEgg and Clang will be made presently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171681 91177308-0d34-0410-b5e6-96231b3b80d8
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-02
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the Function::getRetAttributes method in favor of using the ↵Bill Wendling2012-12-30
| | | | | | AttributeSet accessor method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171256 91177308-0d34-0410-b5e6-96231b3b80d8
* Change AsmOperandInfo::ConstraintVT to MVT, instead of EVT.Patrik Hagglund2012-12-19
| | | | | | | Accordingly, add MVT::getVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170550 91177308-0d34-0410-b5e6-96231b3b80d8
* Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,Patrik Hagglund2012-12-19
| | | | | | | from EVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170536 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::RegisterTypeForVT to contain MVTs, instead ofPatrik Hagglund2012-12-19
| | | | | | | EVTs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170535 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::TransformToType to contain MVTs, instead ofPatrik Hagglund2012-12-19
| | | | | | | EVTs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170534 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::findRepresentativeClass to take an MVT, insteadPatrik Hagglund2012-12-19
| | | | | | | of EVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170532 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.Patrik Hagglund2012-12-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170524 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::getCondCodeAction to take an MVT, instead ofPatrik Hagglund2012-12-19
| | | | | | | EVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170522 91177308-0d34-0410-b5e6-96231b3b80d8
* After reducing the size of an operation in the DAG we zero-extend the reducedNadav Rotem2012-12-19
| | | | | | | | | | bitwidth op back to the original size. If we reduce ANDs then this can cause an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits are equal or smaller than the size of the reduced operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170505 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a ↵Bill Wendling2012-12-19
| | | | | | single attribute in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170502 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove more of 'else's after 'returns'. No functional change.Craig Topper2012-12-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170497 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a bunch of 'else's after 'returns'Craig Topper2012-12-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170496 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be ↵Craig Topper2012-12-19
| | | | | | rewritten as a compare against a constant 0 with the opposite condition. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170495 91177308-0d34-0410-b5e6-96231b3b80d8
* Check multiple register classes for inline asm tied registersHal Finkel2012-12-18
| | | | | | | | | | | | | | | | | | A register can be associated with several distinct register classes. For example, on PPC, the floating point registers are each associated with both F4RC (which holds f32) and F8RC (which holds f64). As a result, this code would fail when provided with a floating point register and an f64 operand because it would happen to find the register in the F4RC class first and return that. From the F4RC class, SDAG would extract f32 as the register type and then assert because of the invalid implied conversion between the f64 value and the f32 register. Instead, search all register classes. If a register class containing the the requested register has the requested type, then return that register class. Otherwise, as before, return the first register class found that contains the requested register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170436 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.Patrik Hagglund2012-12-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170148 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert EVT->MVT changes, r169836-169851, due to buildbot failures.Patrik Hagglund2012-12-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169854 91177308-0d34-0410-b5e6-96231b3b80d8
* Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,Patrik Hagglund2012-12-11
| | | | | | | from EVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169849 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::RegisterTypeForVT to contain MVTs, instead ofPatrik Hagglund2012-12-11
| | | | | | | EVTs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169848 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::TransformToType to contain MVTs, instead ofPatrik Hagglund2012-12-11
| | | | | | | EVTs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169847 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::findRepresentativeClass to take an MVT, insteadPatrik Hagglund2012-12-11
| | | | | | | of EVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169845 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.Patrik Hagglund2012-12-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169843 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::getCondCodeAction to take an MVT, instead ofPatrik Hagglund2012-12-11
| | | | | | | EVT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169842 91177308-0d34-0410-b5e6-96231b3b80d8
* Change TargetLowering::setTypeAction to take an MVT, instead fo EVT.Patrik Hagglund2012-12-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169839 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a coding style nit.Eric Christopher2012-12-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169776 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace r169459 with something safer. Rather than having computeMaskedBits toEvan Cheng2012-12-06
| | | | | | | | | | | understand target implementation of any_extend / extload, just generate zero_extend in place of any_extend for liveouts when the target knows the zero_extend will be implicit (e.g. ARM ldrb / ldrh) or folded (e.g. x86 movz). rdar://12771555 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169536 91177308-0d34-0410-b5e6-96231b3b80d8
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