summaryrefslogtreecommitdiff
path: root/lib/CodeGen
Commit message (Collapse)AuthorAge
* Fix a DenseMap iterator invalidation bug causing lots of crashes whenChandler Carruth2014-01-20
| | | | | | | | | | | | | | | | | | | type units were enabled. The crux of the issue is that the addDwarfTypeUnitType routine can end up being indirectly recursive. In this case, the reference into the dense map (TU) became invalid by the time we popped all the way back and used it to add the DIE type signature. Instead, use early return in the case where we can bypass the recursive step and creating a type unit. Then use the pointer to the new type unit to set up the DIE type signature in the case where we have to. I tried really hard to reduce a testcase for this, but it's really annoying. You have to get this to be mid-recursion when the densemap grows. Even if we got a test case for this today, it'd be very unlikely to continue exercising this pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199630 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug info (LTO): Move the creation of accessibility flags toAdrian Prantl2014-01-18
| | | | | | | | | getOrCreateSubprogramDIE to avoid attributes being added twice when DIEs are merged. rdar://problem/15842330. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199536 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an emitRawComment function and use it to simplify some uses of EmitRawText.Rafael Espindola2014-01-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199397 91177308-0d34-0410-b5e6-96231b3b80d8
* ReMat: fix overly cavalier attitude to sub-register indicesTim Northover2014-01-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two attempted optimisations in reMaterializeTrivialDef, trying to avoid promoting the size of a register too much when rematerializing. Unfortunately, both appear to be flawed. First, we see if the original register would have worked, but this is inadequate. Consider: v1 = SOMETHING (v1 is QQ) v2:Q0 = COPY v1:Q1 (v1, v2 are QQ) ... uses of v2 In this case even though v2 *could* be used directly as the output of SOMETHING, this would set the wrong bits of the QQ register involved. The correct rematerialization must be: v2:Q0_Q1 = SOMETHING (v2 promoted to QQQ) ... uses of v2:Q1_Q2 For the second optimisation, if the correct remat is "v2:idx = SOMETHING" then we can't necessarily expect v2 itself to be valid for SOMETHING, but we do try to hunt for a class between v1 and v2 that works. Unfortunately, this is also wrong: v1 = SOMETHING (v1 is QQ) v2:Q0_Q1 = COPY v1 (v1 is QQ, v2 is QQQ) ... uses of v2 as a QQQ The canonical rematerialization here is "v2:Q0_Q1 = SOMETHING". However current logic would decide that v2 could be a QQ (no interest is taken in later uses). This patch, therefore, always accepts the widened register class without trying to be clever. Generally there is no penalty to this (e.g. in the common GR32 < GR64 case, expanding the width doesn't matter because it's not like you were going to do anything else with the high bits of a GR32 register). It can increase register pressure in cases like the ARM VFP regs though (multiple non-overlapping but equivalent subregisters). This situation can be spotted by the fact that both source and destination in the not-quite-coalesced pair have a sub-register index and rematerialisation is skipped in that situation. Unfortunately, no in-tree targets actually expose this as far as I can tell (there are so few isAsCheapAsAMove instructions for it to trigger on) so I've been unable to produce a test. It was exposed in our ARM64 SPEC tests though, and I will be adding a test there that we should be able to contribute soon(TM). rdar://problem/15775279 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199376 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a slightly smaller hack.Rafael Espindola2014-01-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199363 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAGCombiner] Fix a wrong check in method SimplifyVBinOp.Andrea Di Biagio2014-01-15
| | | | | | | | | | | | | | | | | | | | | This fixes a regression intruced by r199135. Revision 199135 tried to simplify part of the logic in method DAGCombiner::SimplifyVBinOp introducing calls to method BuildVectorSDNode::isConstant(). However, that revision wrongly changed the check performed by method SimplifyVBinOp to identify dag nodes that can be folded. Before revision 199135, that method only tried to simplify vector binary operations if both operands were build_vector of Constant/ConstantFP/Undef only. After revision 199135, method SimplifyVBinop tried to simplify also vector binary operations with only one constant operand. This fixes the problem restoring the old behavior of SimplifyVBinOp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199328 91177308-0d34-0410-b5e6-96231b3b80d8
* WinCOFF: Transform IR expressions featuring __ImageBase into image relative ↵David Majnemer2014-01-15
| | | | | | | | | | | | | | relocations MSVC on x64 requires that we create image relative symbol references to refer to RTTI data. Seeing as how there is no way to explicitly make reference to a given relocation type in LLVM IR, pattern match expressions of the form &foo - &__ImageBase. Differential Revision: http://llvm-reviews.chandlerc.com/D2523 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199312 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure we emit a relocation to the debug_ranges section in theEric Christopher2014-01-15
| | | | | | presence of CU ranges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199276 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable use of ranges for translation units in the presence ofEric Christopher2014-01-14
| | | | | | | -ffunction-sections and update comments and TODOs about other places that we should enable this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199263 91177308-0d34-0410-b5e6-96231b3b80d8
* Decouple dllexport/dllimport from linkageNico Rieck2014-01-14
| | | | | | | | | | | | | | | | | | | Representing dllexport/dllimport as distinct linkage types prevents using these attributes on templates and inline functions. Instead of introducing further mixed linkage types to include linkonce and weak ODR, the old import/export linkage types are replaced with a new separate visibility-like specifier: define available_externally dllimport void @f() {} @Var = dllexport global i32 1, align 4 Linkage for dllexported globals and functions is now equal to their linkage without dllexport. Imported globals and functions must be either declarations with external linkage, or definitions with AvailableExternallyLinkage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199218 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix valgrind warning for gcc builds.Patrik Hagglund2014-01-14
| | | | | | | | Sorry, I don't understand why the warning is generated (a gcc bug?). Anyhow, the change should improve readablity. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199214 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Decouple dllexport/dllimport from linkage"Nico Rieck2014-01-14
| | | | | | | | Revert this for now until I fix an issue in Clang with it. This reverts commit r199204. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199207 91177308-0d34-0410-b5e6-96231b3b80d8
* Decouple dllexport/dllimport from linkageNico Rieck2014-01-14
| | | | | | | | | | | | | | | | | | | Representing dllexport/dllimport as distinct linkage types prevents using these attributes on templates and inline functions. Instead of introducing further mixed linkage types to include linkonce and weak ODR, the old import/export linkage types are replaced with a new separate visibility-like specifier: define available_externally dllimport void @f() {} @Var = dllexport global i32 1, align 4 Linkage for dllexported globals and functions is now equal to their linkage without dllexport. Imported globals and functions must be either declarations with external linkage, or definitions with AvailableExternallyLinkage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199204 91177308-0d34-0410-b5e6-96231b3b80d8
* Always let value types influence register classes.Jakob Stoklund Olesen2014-01-14
| | | | | | | | | | | | | | | | | | | | | When creating a virtual register for a def, the value type should be used to pick the register class. If we only use the register class constraint on the instruction, we might pick a too large register class. Some registers can store values of different sizes. For example, the x86 xmm registers can hold f32, f64, and 128-bit vectors. The three different value sizes are represented by register classes with identical register sets: FR32, FR64, and VR128. These register classes have different spill slot sizes, so it is important to use the right one. The register class constraint on an instruction doesn't necessarily care about the size of the value its defining. The value type determines that. This fixes a problem where InstrEmitter was picking 32-bit register classes for 64-bit values on SPARC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199187 91177308-0d34-0410-b5e6-96231b3b80d8
* Make getTargetStreamer return a possibly null pointer.Rafael Espindola2014-01-14
| | | | | | | | | This will allow it to be called from target independent parts of the main streamer that don't know if there is a registered target streamer or not. This in turn will allow targets to perform extra actions at specified points in the interface: add extra flags for some labels, extra work during finalization, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199174 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAG] Refactor ReassociateOps - no functional change intended.Juergen Ributzka2014-01-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199146 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAG] Teach DAG to also reassociate vector operationsJuergen Ributzka2014-01-13
| | | | | | | | | | This commit teaches DAG to reassociate vector ops, which in turn enables constant folding of vector op chains that appear later on during custom lowering and DAG combine. Reviewed by Andrea Di Biagio git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199135 91177308-0d34-0410-b5e6-96231b3b80d8
* Hide the pre-RA-sched= option.Andrew Trick2014-01-13
| | | | | | | | | This is a very confusing option for a feature that will go away. -enable-misched is exposed instead to help triage issues with the new scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199133 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Split DominatorTree into a concrete analysis result object whichChandler Carruth2014-01-13
| | | | | | | | | | | | | | | | | | | | | | | can be used by both the new pass manager and the old. This removes it from any of the virtual mess of the pass interfaces and lets it derive cleanly from the DominatorTreeBase<> template. In turn, tons of boilerplate interface can be nuked and it turns into a very straightforward extension of the base DominatorTree interface. The old analysis pass is now a simple wrapper. The names and style of this split should match the split between CallGraph and CallGraphWrapperPass. All of the users of DominatorTree have been updated to match using many of the same tricks as with CallGraph. The goal is that the common type remains the resulting DominatorTree rather than the pass. This will make subsequent work toward the new pass manager significantly easier. Also in numerous places things became cleaner because I switched from re-running the pass (!!! mid way through some other passes run!!!) to directly recomputing the domtree. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199104 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Pull the generic graph algorithms and data structures for dominatorChandler Carruth2014-01-13
| | | | | | | | | | | | | | | | | | | | | | | | | trees into the Support library. These are all expressed in terms of the generic GraphTraits and CFG, with no reliance on any concrete IR types. Putting them in support clarifies that and makes the fact that the static analyzer in Clang uses them much more sane. When moving the Dominators.h file into the IR library I claimed that this was the right home for it but not something I planned to work on. Oops. So why am I doing this? It happens to be one step toward breaking the requirement that IR verification can only be performed from inside of a pass context, which completely blocks the implementation of verification for the new pass manager infrastructure. Fixing it will also allow removing the concept of the "preverify" step (WTF???) and allow the verifier to cleanly flag functions which fail verification in a way that precludes even computing dominance information. Currently, that results in a fatal error even when you ask the verifier to not fatally error. It's awesome like that. The yak shaving will continue... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199095 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "ReMat: fix overly cavalier attitude to sub-register indices"Tim Northover2014-01-13
| | | | | | | | | | Very sorry, this was a premature patch that I still need to investigate and finish off (for some reason beyond me at the moment it doesn't actually fix the issue in all cases). This reverts commit r199091. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199093 91177308-0d34-0410-b5e6-96231b3b80d8
* ReMat: fix overly cavalier attitude to sub-register indicesTim Northover2014-01-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two attempted optimisations in reMaterializeTrivialDef, trying to avoid promoting the size of a register too much when rematerializing. Unfortunately, both appear to be flawed. First, we see if the original register would have worked, but this is inadequate. Consider: v1 = SOMETHING (v1 is QQ) v2:Q0 = COPY v1:Q1 (v1, v2 are QQ) ... uses of v2 In this case even though v2 *could* be used directly as the output of SOMETHING, this would set the wrong bits of the QQ register involved. The correct rematerialization must be: v2:Q0_Q1 = SOMETHING (v2 promoted to QQQ) ... uses of v2:Q1_Q2 For the second optimisation, if the correct remat is "v2:idx = SOMETHING" then we can't necessarily expect v2 itself to be valid for SOMETHING, but we do try to hunt for a class between v1 and v2 that works. Unfortunately, this is also wrong: v1 = SOMETHING (v1 is QQ) v2:Q0_Q1 = COPY v1 (v1 is QQ, v2 is QQQ) ... uses of v2 as a QQQ The canonical rematerialization here is "v2:Q0_Q1 = SOMETHING". However current logic would decide that v2 could be a QQ (no interest is taken in later uses). This patch, therefore, always accepts the widened register class without trying to be clever. Generally there is no penalty to this (e.g. in the common GR32 < GR64 case, expanding the width doesn't matter because it's not like you were going to do anything else with the high bits of a GR32 register). It can increase register pressure in cases like the ARM VFP regs though (multiple non-overlapping but equivalent subregisters). Hopefully this situation is rare enough that it won't matter. Unfortunately, no in-tree targets actually expose this as far as I can tell (there are so few isAsCheapAsAMove instructions for it to trigger on) so I've been unable to produce a test. It was exposed in our ARM64 SPEC tests though, and I will be adding a test there that we should be able to contribute soon(TM). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199091 91177308-0d34-0410-b5e6-96231b3b80d8
* [cleanup] Move the Dominators.h and Verifier.h headers into the IRChandler Carruth2014-01-13
| | | | | | | | | | | | | | | | | | directory. These passes are already defined in the IR library, and it doesn't make any sense to have the headers in Analysis. Long term, I think there is going to be a much better way to divide these matters. The dominators code should be fully separated into the abstract graph algorithm and have that put in Support where it becomes obvious that evn Clang's CFGBlock's can use it. Then the verifier can manually construct dominance information from the Support-driven interface while the Analysis library can provide a pass which both caches, reconstructs, and supports a nice update API. But those are very long term, and so I don't want to leave the really confusing structure until that day arrives. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199082 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle bundled terminators in isBlockOnlyReachableByFallthrough.Jakob Stoklund Olesen2014-01-12
| | | | | | | | | | Targets like SPARC and MIPS have delay slots and normally bundle the delay slot instruction with the corresponding terminator. Teach isBlockOnlyReachableByFallthrough to find any MBB operands on bundled terminators so SPARC doesn't need to specialize this function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199061 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix non-deterministic SDNodeOrder-dependent codegenNico Rieck2014-01-12
| | | | | | | Reset SelectionDAGBuilder's SDNodeOrder to ensure deterministic code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199050 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Simplify the interface exposed for IR printing passes.Chandler Carruth2014-01-12
| | | | | | | | | | | | Nothing was using the ability of the pass to delete the raw_ostream it printed to, and nothing was trying to pass it a pointer to the raw_ostream. Also, the function variant had a different order of arguments from all of the others which was just really confusing. Now the interface accepts a reference, doesn't offer to delete it, and uses a consistent order. The implementation of the printing passes haven't been updated with this simplification, this is just the API switch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199044 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Rename the IR printing pass header to a more generic and correctChandler Carruth2014-01-12
| | | | | | | | name to match the source file which I got earlier. Update the include sites. Also modernize the comments in the header to use the more recommended doxygen style. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199041 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 'ned' typo in doc commentAlp Toker2014-01-11
| | | | | | Patch by Jasper Neumann! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199007 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r198979 - accidental commit.Eric Christopher2014-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198981 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformat.Eric Christopher2014-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198980 91177308-0d34-0410-b5e6-96231b3b80d8
* Update function name and add some helpful comments.Eric Christopher2014-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198979 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert r198851, "Prototype of skeleton type units for fission""David Blaikie2014-01-10
| | | | | | | | | This reverts commit r198865 which reverts r198851. ASan identified a use-of-uninitialized of the DwarfTypeUnit::Ty variable in skeleton type units. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198908 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r198851, "Prototype of skeleton type units for fission"NAKAMURA Takumi2014-01-09
| | | | | | It caused undefined behavior. DwarfTypeUnit::Ty might not be initialized properly, I guess. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198865 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle masked rotate amountsRichard Sandiford2014-01-09
| | | | | | | | | | | | | | | At the moment we expect rotates to have the form: (or (shl X, Y), (shr X, Z)) where Y == bitsize(X) - Z or Z == bitsize(X) - Y. This form means that the (or ...) is undefined for Y == 0 or Z == 0. This undefinedness can be avoided by using Y == (C * bitsize(X) - Z) & (bitsize(X) - 1) or Z == (C * bitsize(X) - Y) & (bitsize(X) - 1) for any integer C (including 0, the most natural choice). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198861 91177308-0d34-0410-b5e6-96231b3b80d8
* Match the InstCombine form of rotates by X+CRichard Sandiford2014-01-09
| | | | | | | | | | | | | | | | | | InstCombine converts (sub 32, (add X, C)) into (sub 32-C, X), so a rotate left of a 32-bit Y by X+C could appear as either: (or (shl Y, (add X, C)), (shr Y, (sub 32, (add X, C)))) without InstCombine or: (or (shl Y, (add X, C)), (shr Y, (sub 32-C, X))) with it. We already matched the first form. This patch handles the second too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198860 91177308-0d34-0410-b5e6-96231b3b80d8
* Prototype of skeleton type units for fissionDavid Blaikie2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198851 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfDebug: Refactor out common skeleton construction code to be reused for ↵David Blaikie2014-01-09
| | | | | | type unit skeletons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198846 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformatting for r198842David Blaikie2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198843 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfUnit: Rename "Node" to "CUNode" and propagate it through DwarfTypeUnit ↵David Blaikie2014-01-09
| | | | | | | | | | as well. Since we'll now also need the split dwarf file name along with the language in DwarfTypeUnits, just use the whole DICompileUnit rather than explicitly handling each field needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198842 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "DwarfUnit: Move the DICompileUnit Node to the DwarfCompileUnit only"David Blaikie2014-01-09
| | | | | | | | This reverts commit r198830. Decided to go a different way with this... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198841 91177308-0d34-0410-b5e6-96231b3b80d8
* Put the functionality for printing a value to a raw_ostream as anChandler Carruth2014-01-09
| | | | | | | | | | | | operand into the Value interface just like the core print method is. That gives a more conistent organization to the IR printing interfaces -- they are all attached to the IR objects themselves. Also, update all the users. This removes the 'Writer.h' header which contained only a single function declaration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198836 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfUnit: Move the DICompileUnit Node to the DwarfCompileUnit onlyDavid Blaikie2014-01-09
| | | | | | It's unused in DwarfTypeUnit, as is expected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198830 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm.experimental.stackmap: fix encoding of large constants.Andrew Trick2014-01-09
| | | | | | | | | | In the stackmap format we advertise the constant field as signed. However, we were determining whether to promote to a 64-bit constant pool based on an unsigned comparison. This fix allows -1 to be encoded as a small constant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198816 91177308-0d34-0410-b5e6-96231b3b80d8
* Conservatively handle multiple MMOs in MIsNeedChainEdgeHal Finkel2014-01-08
| | | | | | | | | | | | | | | | | | | | | | MIsNeedChainEdge, which is used by -enable-aa-sched-mi (AA in misched), had an llvm_unreachable when -enable-aa-sched-mi is enabled and we reach an instruction with multiple MMOs. Instead, return a conservative answer. This allows testing -enable-aa-sched-mi on x86. Also, this moves the check above the isUnsafeMemoryObject checks. isUnsafeMemoryObject is currently correct only for instructions with one MMO (as noted in the comment in isUnsafeMemoryObject): // We purposefully do no check for hasOneMemOperand() here // in hope to trigger an assert downstream in order to // finish implementation. The problem with this is that, had the candidate edge passed the "!MIa->mayStore() && !MIb->mayStore()" check, the hoped-for assert would never happen (which could, in theory, lead to incorrect behavior if one of these secondary MMOs was volatile, for example). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198795 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAGCombiner how to fold 'vselect' dag nodes accordingAndrea Di Biagio2014-01-08
| | | | | | | | | | to the following two rules: 1) fold (vselect (build_vector AllOnes), A, B) -> A 2) fold (vselect (build_vector AllZeros), A, B) -> B git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198777 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAGCombiner] Factor duplicated rotate code into a separate functionRichard Sandiford2014-01-08
| | | | | | | No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198768 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the llvm mangler to lib/IR.Rafael Espindola2014-01-07
| | | | | | This makes it available to tools that don't link with target (like llvm-ar). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198708 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit arange padding with a single directive.Benjamin Kramer2014-01-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198700 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the LLVM IR asm writer header files into the IR directory, as theyChandler Carruth2014-01-07
| | | | | | | | | | | | | | | | | are part of the core IR library in order to support dumping and other basic functionality. Rename the 'Assembly' include directory to 'AsmParser' to match the library name and the only functionality left their -- printing has been in the core IR library for quite some time. Update all of the #includes to match. All of this started because I wanted to have the layering in good shape before I started adding support for printing LLVM IR using the new pass infrastructure, and commandline support for the new pass infrastructure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198688 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-07
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198685 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 16:04:25 +0000