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	Commit message (Collapse)	Author	Age
*	- Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo	Evan Cheng	2011-07-11
\| \| \| \| \| \| \| \| \| \| \| \| \|	and MCSubtargetInfo. - Added methods to update subtarget features (used when targets automatically detect subtarget features or switch modes). - Teach X86Subtarget to update MCSubtargetInfo features bits since the MCSubtargetInfo layer can be shared with other modules. - These fixes .code 16 / .code 32 support since mode switch is updated in MCSubtargetInfo so MC code emitter can do the right thing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
*	Change createAsmParser to take a MCSubtargetInfo instead of triple,	Evan Cheng	2011-07-09
\| \| \| \| \| \| \| \| \| \|	CPU, and feature string. Parsing some asm directives can change subtarget state (e.g. .code 16) and it must be reflected in other modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance must be shared. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8
*	Compute feature bits at time of MCSubtargetInfo initialization.	Evan Cheng	2011-07-07
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add getFeatureBits to extract feature bits for a given CPU.	Evan Cheng	2011-07-02
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134298 91177308-0d34-0410-b5e6-96231b3b80d8
*	- Added MCSubtargetInfo to capture subtarget features and scheduling	Evan Cheng	2011-07-01
	itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8