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* - Add subtarget feature -mattr=+db which determine whether an ARM cpu has theEvan Cheng2010-08-11
* Change -prefer-32bit-thumb to attribute -mattr=+32bit instead to disable more...Evan Cheng2010-08-09
* Add an ARM "feature". Cortex-a8 fp comparison is very slow (> 20 cycles).Evan Cheng2010-07-13
* Cleanup of ARMv7M support. Move hardware divide and Thumb2 extract/packJim Grosbach2010-05-05
* Add initial support for ARMv7M subtarget and cortex-m3 cpu. Patch byJim Grosbach2010-05-05
* Some bits of A9 scheduling: VFPAnton Korobeynikov2010-04-07
* Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.Jakob Stoklund Olesen2010-04-05
* vml[as] are slow on 1136jf-s also.Jim Grosbach2010-04-01
* switch the flag for using NEON for SP floating point to a subtarget 'feature'.Jim Grosbach2010-03-25
* need to fix 'make check' tests first. revert for a moment.Jim Grosbach2010-03-25
* switch the flag for using NEON for SP floating point to a subtarget 'feature'Jim Grosbach2010-03-25
* switch the use-vml[as] instructions flag to a subtarget 'feature'Jim Grosbach2010-03-25
* Add substarget feature for FP16Anton Korobeynikov2010-03-14
* Add ARMv6 itineraries.David Goodwin2009-11-18
* Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,...Anton Korobeynikov2009-11-02
* Remove neonfp attribute and instead set default based on CPU string. Add -arm...David Goodwin2009-10-01
* Restore the -post-RA-scheduler flag as an override for the target specificati...David Goodwin2009-10-01
* Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post...David Goodwin2009-09-30
* Checkpoint NEON scheduling itineraries.David Goodwin2009-09-23
* Allow a zero cycle stage to reserve/require a FU without advancing the cycle ...David Goodwin2009-08-11
* Make NEON single-precision FP support the default for cortex-a8 (again).David Goodwin2009-08-07
* Disable NEON single-precision FP support for Cortex-A8, for now...David Goodwin2009-08-05
* By default, for cortex-a8 use NEON for single-precision FP. David Goodwin2009-08-05
* Initial support for single-precision FP using NEON. Added "neonfp" attribute ...David Goodwin2009-08-04
* Add fake v7 itineraries for now.Evan Cheng2009-07-21
* Add a Thumb2 instruction flag to that indicates whether the instruction can b...Evan Cheng2009-07-08
* Latency information for ARM v6. It's rough and not yet hooked up. Right now ...Evan Cheng2009-06-19
* Separate V6 from V6T2 since the latter has some extra nice instructionsAnton Korobeynikov2009-06-08
* Add placeholder for thumb2 stuffAnton Korobeynikov2009-05-29
* Add ARMv7 architecture, Cortex processors and different FPU modes handling.Anton Korobeynikov2009-05-23
* Use CallConvLower.h and TableGen descriptions of the calling conventionsBob Wilson2009-04-17
* Move target independent td files from lib/Target/ to include/llvm/Target so t...Evan Cheng2008-11-24
* Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 enc...Evan Cheng2008-11-06
* Restructure ARM code emitter to use instruction formats instead of addressing...Evan Cheng2008-11-05
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-29
* Initial JIT support for ARM by Raul Fernandes Herbster.Evan Cheng2007-08-07
* Add a processor.Lauro Ramos Venancio2007-05-04
* ARM backend contribution from Apple.Evan Cheng2007-01-19
* getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.Evan Cheng2006-05-18
* Remove PointerType from class TargetEvan Cheng2006-05-17
* added a skeleton of the ARM backendRafael Espindola2006-05-14
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