| Commit message (Expand) | Author | Age |
... | |
* | Handle register-to-register copies within the tGPR class. | Bob Wilson | 2010-04-26 |
* | use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() | Chris Lattner | 2010-04-02 |
* | Thumb2 storeFrom/LoadToStackSlot() need to handle tGPR regs directly, not pass | Jim Grosbach | 2010-03-27 |
* | Fix a crash compiling 254.gap for Thumb2. The Thumb2 add/sub with 12-bit | Bob Wilson | 2010-03-08 |
* | Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex. | Bob Wilson | 2010-02-06 |
* | Remove predicates when changing an add into an unpredicable mov. | Jakob Stoklund Olesen | 2010-01-19 |
* | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman | 2009-12-05 |
* | Refactor code. | Evan Cheng | 2009-11-08 |
* | 80-column cleanup of file header comments | Jim Grosbach | 2009-11-07 |
* | t2ldrpci_pic can be used for blockaddress as well. | Evan Cheng | 2009-11-07 |
* | Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRp... | Evan Cheng | 2009-11-07 |
* | - Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical | Evan Cheng | 2009-11-07 |
* | - Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative | Evan Cheng | 2009-11-06 |
* | Use NEON reg-reg moves, where profitable. This reduces "domain-cross" stalls,... | Anton Korobeynikov | 2009-11-02 |
* | Fix a couple more places where we are creating ld / st instructions without m... | Evan Cheng | 2009-11-01 |
* | Add a Thumb BRIND pattern. Change the ARM BRIND assembly to separate the | Bob Wilson | 2009-10-28 |
* | Handle AddrMode4 for Thumb2 in rewriteT2FrameIndex. This occurs for | Bob Wilson | 2009-09-15 |
* | Fix PR4789. Teach eliminateFrameIndex how to handle VLDRQ and VSTRQ which can... | Evan Cheng | 2009-08-27 |
* | Whitespace cleanup. Remove trailing whitespace. | Jim Grosbach | 2009-08-11 |
* | Always use the 16-bit tMOVgpr2gpr instead of the 32-bit t2MOVr. | Evan Cheng | 2009-08-10 |
* | Use 16-bit tMOVgpr2gpr instead of tMOVr to copy GPR registers in Thumb2 mode. | Evan Cheng | 2009-08-07 |
* | It turns out most of the thumb2 instructions are not allowed to touch SP. The... | Evan Cheng | 2009-08-07 |
* | Use the i12 variant of load / store opcodes if offset is zero. Now we pass al... | Evan Cheng | 2009-08-03 |
* | Move the getInlineAsmLength virtual method from TAI to TII, where | Chris Lattner | 2009-08-02 |
* | Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte /... | Evan Cheng | 2009-07-29 |
* | Thumb-2: fix typo that caused incorrect stack elimination for VFP operations ... | David Goodwin | 2009-07-28 |
* | - More refactoring. This gets rid of all of the getOpcode calls. | Evan Cheng | 2009-07-28 |
* | More DCE. | Evan Cheng | 2009-07-27 |
* | Get rid of more dead code. | Evan Cheng | 2009-07-27 |
* | Get rid of some more getOpcode calls. | Evan Cheng | 2009-07-27 |
* | Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate m... | Evan Cheng | 2009-07-27 |
* | Use the right instructions to copy between GPR and the more strictive tGPR cl... | Evan Cheng | 2009-07-27 |
* | Get rid of a couple of unnecessary getOpcode calls. | Evan Cheng | 2009-07-25 |
* | Change Thumb2 jumptable codegen to one that uses two level jumps: | Evan Cheng | 2009-07-25 |
* | Clean up. | Evan Cheng | 2009-07-24 |
* | FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructi... | Evan Cheng | 2009-07-24 |
* | Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index eliminatio... | David Goodwin | 2009-07-24 |
* | Fix frame index elimination to correctly handle thumb-2 addressing modes that... | David Goodwin | 2009-07-23 |
* | Emit cross regclass register moves for thumb2. | Anton Korobeynikov | 2009-07-16 |
* | Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies... | Evan Cheng | 2009-07-11 |
* | t2LDM_RET does not fall-through. | David Goodwin | 2009-07-10 |
* | Use common code for both ARM and Thumb-2 instruction and register info. | David Goodwin | 2009-07-08 |
* | Generalize opcode selection in ARMBaseRegisterInfo. | David Goodwin | 2009-07-08 |
* | Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh... | David Goodwin | 2009-07-08 |
* | Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1Ins... | David Goodwin | 2009-07-02 |