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	Commit message (Collapse)	Author	Age
*	Sort includes for all of the .h files under the 'lib' tree. These were	Chandler Carruth	2012-12-04
\| \| \| \| \| \| \| \| \| \|	missed in the first pass because the script didn't yet handle include guards. Note that the script is now able to handle all of these headers without manual edits. =] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169224 91177308-0d34-0410-b5e6-96231b3b80d8
*	Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵	Jia Liu	2012-02-18
\| \| \| \| \| \|	MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
*	Compute feature bits at time of MCSubtargetInfo initialization.	Evan Cheng	2011-07-07
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
*	Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.	Evan Cheng	2011-07-01
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
*	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	Evan Cheng	2011-07-01
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134259 91177308-0d34-0410-b5e6-96231b3b80d8
*	- Added MCSubtargetInfo to capture subtarget features and scheduling	Evan Cheng	2011-07-01
\| \| \| \| \| \| \| \| \| \|	itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
*	Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to	Evan Cheng	2011-06-30
\| \| \| \| \| \| \| \| \| \| \|	be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134127 91177308-0d34-0410-b5e6-96231b3b80d8
*	Sink SubtargetFeature and TargetInstrItineraries (renamed ↵	Evan Cheng	2011-06-29
\| \| \| \| \| \|	MCInstrItineraries) into MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add scheduling information for the MBlaze backend.	Wesley Peck	2011-04-11
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129311 91177308-0d34-0410-b5e6-96231b3b80d8
*	Adding the MicroBlaze backend.	Wesley Peck	2010-02-23
	The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8