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path: root/lib/Target/Mips/MipsCallingConv.td
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* [mips] Correct callee saved list for the N32 ABI and enable testDaniel Sanders2014-04-16
| | | | | | | | | | | | Summary: Depends on D3339 Reviewers: matheusalmeida, vmedic Reviewed By: matheusalmeida Differential Revision: http://reviews.llvm.org/D3340 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206371 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Forbid the use of registers t6, t7 and t8 if the target is NaCl.Sasa Stankovic2014-02-07
| | | | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D2694 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200978 91177308-0d34-0410-b5e6-96231b3b80d8
* Last change for mips16 prolog/epilog cleanup and optimization.Reed Kotler2013-12-15
| | | | | | | | | | | Some tiny cosmetic code changes to follow. Because of the wide ranging nature of the patch a full 24 test cycle was needed to check against regression. This was the smallest patch I could make to progress from the earlier ones in the series. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197350 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add support for calling convention CC_MipsO32_FP64, which is used ↵Akira Hatanaka2013-08-20
| | | | | | | | | | | when the size of floating point registers is 64-bit. Test case will be added when support for mfhc1 and mthc1 is added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188847 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Remove predicates that were incorrectly or unnecessarily added.Akira Hatanaka2013-08-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188845 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips td file formatting: white space and long linesJack Carter2013-05-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182047 91177308-0d34-0410-b5e6-96231b3b80d8
* Checkin in of first of several patches to finish implementation ofReed Kotler2013-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mips16/mips32 floating point interoperability. This patch fixes returns from mips16 functions so that if the function was in fact called by a mips32 hard float routine, then values that would have been returned in floating point registers are so returned. Mips16 mode has no floating point instructions so there is no way to load values into floating point registers. This is needed when returning float, double, single complex, double complex in the Mips ABI. Helper functions in libc for mips16 are available to do this. For efficiency purposes, these helper functions have a different calling convention from normal Mips calls. Registers v0,v1,a0,a1 are used to pass parameters instead of a0,a1,a2,a3. This is because v0,v1,a0,a1 are the natural registers used to return floating point values in soft float. These values can then be moved to the appropriate floating point registers with no extra cost. The only register that is modified is ra in this call. The helper functions make sure that the return values are in the floating point registers that they would be in if soft float was not in effect (which it is for mips16, though the soft float is implemented using a mips32 library that uses hard float). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Remove android calling convention.Akira Hatanaka2013-03-05
| | | | | | | | | This calling convention was added just to handle functions which return vector of floats. The fix committed in r165585 solves the problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176530 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix MipsCC::analyzeReturn so that, in soft-float mode, fp128 getsAkira Hatanaka2013-03-05
| | | | | | | | returned in registers $2 and $4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176527 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the methods and classes that were added to simplify LowerCall and Akira Hatanaka2012-10-27
| | | | | | | | | | LowerFormalArguments in MipsTargetLowering. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166846 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Android ABI to Mips backend to handle functions returning vectors of fourAkira Hatanaka2012-08-16
| | | | | | | | | floats. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162008 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement fastcc calling convention for MIPS.Akira Hatanaka2012-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158410 91177308-0d34-0410-b5e6-96231b3b80d8
* Changes for migrating to using register mask operands.Akira Hatanaka2012-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151847 91177308-0d34-0410-b5e6-96231b3b80d8
* remove blanks, and some code formatJia Liu2012-02-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not promote i32 arguments to i64. This was causing unnecessary sign extensionAkira Hatanaka2012-02-17
| | | | | | | | instructions to be emitted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150782 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove comment.Akira Hatanaka2012-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150739 91177308-0d34-0410-b5e6-96231b3b80d8
* AnalyzeCallOperands function for N32/64.Akira Hatanaka2011-11-14
| | | | | | | | | | N32/64 places all variable arguments in integer registers (or on stack), regardless of their types, but follows calling convention of non-vaarg function when it handles fixed arguments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144553 91177308-0d34-0410-b5e6-96231b3b80d8
* Function for handling byval arguments.Akira Hatanaka2011-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144447 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement N32/64 calling convention. Patch by Liu.Akira Hatanaka2011-09-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140401 91177308-0d34-0410-b5e6-96231b3b80d8
* Add A0 and A1 to the list of registers used for returning a value in order toAkira Hatanaka2011-06-21
| | | | | | | | handle functions with return type Complex long long. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133497 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment typo. Noticed by Liu.Duncan Sands2011-04-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130120 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverse unnecessary changes made in r129606 and r129608. There is no change ↵Akira Hatanaka2011-04-15
| | | | | | in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129612 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix lines that have incorrect indentation or exceed 80 columns. There is no ↵Akira Hatanaka2011-04-15
| | | | | | change in functionality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129606 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by ↵Bruno Cardoso Lopes2011-03-04
| | | | | | Hatanaka, Akira git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127003 91177308-0d34-0410-b5e6-96231b3b80d8
* fix emacs language spec's, patch by Edmund Grimley-Evans!Chris Lattner2010-08-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111241 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix return registers for mips eabiBruno Cardoso Lopes2010-01-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93875 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for Mips O32 Calling ConventionBruno Cardoso Lopes2009-03-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67280 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR2615Bruno Cardoso Lopes2008-08-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54312 91177308-0d34-0410-b5e6-96231b3b80d8
* Several changes to Mips backend, experimental fp support being the mostBruno Cardoso Lopes2008-07-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53146 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial Mips support, here we go! =)Bruno Cardoso Lopes2007-06-06
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37461 91177308-0d34-0410-b5e6-96231b3b80d8
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