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path: root/lib/Target/Mips/MipsISelLowering.h
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* Checkin in of first of several patches to finish implementation ofReed Kotler2013-05-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mips16/mips32 floating point interoperability. This patch fixes returns from mips16 functions so that if the function was in fact called by a mips32 hard float routine, then values that would have been returned in floating point registers are so returned. Mips16 mode has no floating point instructions so there is no way to load values into floating point registers. This is needed when returning float, double, single complex, double complex in the Mips ABI. Helper functions in libc for mips16 are available to do this. For efficiency purposes, these helper functions have a different calling convention from normal Mips calls. Registers v0,v1,a0,a1 are used to pass parameters instead of a0,a1,a2,a3. This is because v0,v1,a0,a1 are the natural registers used to return floating point values in soft float. These values can then be moved to the appropriate floating point registers with no extra cost. The only register that is modified is ra in this call. The helper functions make sure that the return values are in the floating point registers that they would be in if soft float was not in effect (which it is for mips16, though the soft float is implemented using a mips32 library that uses hard float). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Instruction selection patterns for DSP-ASE vector select and compareAkira Hatanaka2013-04-30
| | | | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180820 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover2013-04-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Instruction selection patterns for DSP-ASE vector shifts.Akira Hatanaka2013-04-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179906 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN andAkira Hatanaka2013-04-13
| | | | | | | | | lowerINTRINSIC_WO_CHAIN into MipsSETargetLowering. No functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179444 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add mips-specific nodes which will be used to select multiply and divideAkira Hatanaka2013-03-30
| | | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178394 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Define two subclasses of MipsTargetLowering. Mips16TargetLowering is forAkira Hatanaka2013-03-13
| | | | | | | | | | mips16 and MipsSETargetLowering is for mips32/64. No functionality changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176917 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Rename function and variable names to start with proper case. Fix typos.Akira Hatanaka2013-03-12
| | | | | | | | Delete commented-out code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176844 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Custom-legalize BR_JT.Akira Hatanaka2013-03-06
| | | | | | | | In N64-static, GOT address is needed to compute the branch address. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176580 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix MipsTargetLowering::LowerCallResult and LowerReturn to correctlyAkira Hatanaka2013-03-05
| | | | | | | | handle fp128 returns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176523 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix MipsTargetLowering::LowerCall to pass fp128 arguments in floatingAkira Hatanaka2013-03-05
| | | | | | | | point registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176521 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Correct handling of fp128 (long double) formals and read long doubleAkira Hatanaka2013-03-05
| | | | | | | | parameters from floating point registers if target is mips64 hard float. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176520 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR10475Michael Liao2013-03-01
| | | | | | | | | | | | | | | | - ISD::SHL/SRL/SRA must have either both scalar or both vector operands but TLI.getShiftAmountTy() so far only return scalar type. As a result, backend logic assuming that breaks. - Rename the original TLI.getShiftAmountTy() to TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to return target-specificed scalar type or the same vector type as the 1st operand. - Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176364 91177308-0d34-0410-b5e6-96231b3b80d8
* Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.Reed Kotler2013-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176007 91177308-0d34-0410-b5e6-96231b3b80d8
* Make psuedo FEXT_T8I816_ins into a custom emitter.Reed Kotler2013-02-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176002 91177308-0d34-0410-b5e6-96231b3b80d8
* Make psuedo FEXT_T8I816_ins a custom inserter. It should be expandedReed Kotler2013-02-24
| | | | | | | | as early as possible; which means during instruction selection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175984 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand pseudos/macros for Selt. This is the last of the complexReed Kotler2013-02-23
| | | | | | | | macros.The rest is some small misc. stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175950 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a nomenclature mistake. Slt->Slti in the functions. The "i" refersReed Kotler2013-02-22
| | | | | | | | to the immediate operand of sli or cmp function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175865 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand mips16 SelT form pseudso/macros.Reed Kotler2013-02-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175862 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand the sel pseudo/macro. This generates basic blocks where previouslyReed Kotler2013-02-21
| | | | | | | | | there were inline br .+4 instructions. Soon everything can enjoy the full instruction scheduling experience. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175718 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Clean up class MipsCCInfo.Akira Hatanaka2013-02-15
| | | | | | | No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175310 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Lower EH_RETURN.Akira Hatanaka2013-01-30
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173862 91177308-0d34-0410-b5e6-96231b3b80d8
* Make some code a little simpler.Reed Kotler2013-01-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173649 91177308-0d34-0410-b5e6-96231b3b80d8
* The next phase of Mips16 hard float implementation.Reed Kotler2013-01-24
| | | | | | | | | | | | | | | | | | Allow Mips16 routines to call Mips32 routines that have abi requirements that either arguments or return values are passed in floating point registers. This handles only the pic case. We have not done non pic for Mips16 yet in any form. The libm functions are Mips32, so with this addition we have a complete Mips16 hard float implementation. We still are not able to complete mix Mip16 and Mips32 with hard float. That will be the next phase which will have several steps. For Mips32 to freely call Mips16 some stub functions must be created. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173320 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Clean up code in MipsTargetLowering::LowerCall. No functional changeAkira Hatanaka2013-01-22
| | | | | | | | intended git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173189 91177308-0d34-0410-b5e6-96231b3b80d8
* This code implements most of mips16 hardfloat as it is done by gcc.Reed Kotler2012-12-15
| | | | | | | | | | | | | | | | | | In this case, essentially it is soft float with different library routines. The next step will be to make this fully interoperational with mips32 floating point and that requires creating stubs for functions with signatures that contain floating point types. I have a more sophisticated design for mips16 hardfloat which I hope to implement at a later time that directly does floating point without the need for function calls. The mips16 encoding has no floating point instructions so one needs to switch to mips32 mode to execute floating point instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170259 91177308-0d34-0410-b5e6-96231b3b80d8
* Sorry about the churn. One more change to getOptimalMemOpType() hook. Did IEvan Cheng2012-12-12
| | | | | | | | | | | | | mention the inline memcpy / memset expansion code is a mess? This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset. The first indicates whether it is expanding a memset or a memcpy / memmove. The later is whether the memset is a memset of zero. It's totally possible (likely even) that targets may want to do different things for memcpy and memset of zero. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169959 91177308-0d34-0410-b5e6-96231b3b80d8
* - Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term.Evan Cheng2012-12-12
| | | | | | | | | | Also added more comments to explain why it is generally ok to return true. - Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to be true for loaded source (memcpy) or zero constants (memset). The poor name choice is probably some kind of legacy issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169954 91177308-0d34-0410-b5e6-96231b3b80d8
* Some enhancements for memcpy / memset inline expansion.Evan Cheng2012-12-10
| | | | | | | | | | | | | | | | | | | | | | 1. Teach it to use overlapping unaligned load / store to copy / set the trailing bytes. e.g. On 86, use two pairs of movups / movaps for 17 - 31 byte copies. 2. Use f64 for memcpy / memset on targets where i64 is not legal but f64 is. e.g. x86 and ARM. 3. When memcpy from a constant string, do *not* replace the load with a constant if it's not possible to materialize an integer immediate with a single instruction (required a new target hook: TLI.isIntImmLegal()). 4. Use unaligned load / stores more aggressively if target hooks indicates they are "fast". 5. Update ARM target hooks to use unaligned load / stores. e.g. vld1.8 / vst1.8. Also increase the threshold to something reasonable (8 for memset, 4 pairs for memcpy). This significantly improves Dhrystone, up to 50% on ARM iOS devices. rdar://12760078 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169791 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial implementation of MipsTargetLowering::isLegalAddressingMode.Akira Hatanaka2012-11-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168230 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka2012-11-07
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167548 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Allow tail-call optimization for vararg functions and functions whichAkira Hatanaka2012-10-30
| | | | | | | | use the caller's stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167048 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definition of function MipsTargetLowering::passArgOnStack which emits nodesAkira Hatanaka2012-10-30
| | | | | | | | for passing a function call argument on a stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167041 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Do not tail-call optimize vararg functions or functions with byvalAkira Hatanaka2012-10-27
| | | | | | | | | | arguments. This is rather conservative and should be fixed later to be more aggressive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166851 91177308-0d34-0410-b5e6-96231b3b80d8
* Add method MipsTargetLowering::writeVarArgRegs which copies argument registersAkira Hatanaka2012-10-27
| | | | | | | | of vararg functions back to the stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166844 91177308-0d34-0410-b5e6-96231b3b80d8
* Add method MipsTargetLowering::passByValArg.Akira Hatanaka2012-10-27
| | | | | | | | | | This method emits nodes for passing byval arguments in registers and stack. This has the same functionality as existing functions PassByValArg64 and WriteByValArg which will be deleted later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166843 91177308-0d34-0410-b5e6-96231b3b80d8
* Add method MipsTargetLowering::copyByValRegs.Akira Hatanaka2012-10-27
| | | | | | | | | | This method copies byval arguments passed in registers onto the stack and has the same functionality as existing functions CopyMips64ByValRegs and ReadByValArg which will be deleted later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166841 91177308-0d34-0410-b5e6-96231b3b80d8
* Add class MipsCC which provides methods used to analyze formal and callAkira Hatanaka2012-10-26
| | | | | | | | arguments and inquire about calling convention information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166840 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add code to do tail call optimization.Akira Hatanaka2012-10-19
| | | | | | | | | Currently, it is enabled only if option "enable-mips-tail-calls" is given and all of the callee's arguments are passed in registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166342 91177308-0d34-0410-b5e6-96231b3b80d8
* Add node and enum for mips tail call.Akira Hatanaka2012-10-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166318 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MipsTargetLowering::CanLowerReturn.Akira Hatanaka2012-10-10
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165585 91177308-0d34-0410-b5e6-96231b3b80d8
* MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos ↵Akira Hatanaka2012-09-27
| | | | | | Field instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164751 91177308-0d34-0410-b5e6-96231b3b80d8
* MIPS DSP: add support for extract-word instructions.Akira Hatanaka2012-09-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164749 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MIPS DSP register classes. Set actions of DSP vector operations and overrideAkira Hatanaka2012-09-21
| | | | | | | TargetLowering's callback functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164431 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG node enums for MIPS DSP nodes.Akira Hatanaka2012-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164430 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.Akira Hatanaka2012-07-31
| | | | | | | | | The frame object which points to the dynamically allocated area will not be needed after changes are made to cease reserving call frames. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161076 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC.Akira Hatanaka2012-07-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160064 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower RETURNADDR node in Mips backend.Akira Hatanaka2012-07-11
| | | | | | | Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160031 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
* Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp.Akira Hatanaka2012-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158414 91177308-0d34-0410-b5e6-96231b3b80d8
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