llvm - Unofficial llvm GIT mirror used in EmbToolkit

	Commit message (Expand)	Author	Age
*	Merging r195399:	Bill Wendling	2013-11-22
*	R600: Fix scheduling of instructions that use the LDS output queue	Tom Stellard	2013-11-15
*	R600/SI: Add support for private address space load/store	Tom Stellard	2013-11-13
*	R600: Simplify handling of private address space	Tom Stellard	2013-10-22
*	R600: Remove unused InstrInfo::getMovImmInstr() function	Tom Stellard	2013-10-22
*	R600: add a pass that merges clauses.	Vincent Lejeune	2013-10-01
*	IfConverter: Use TargetSchedule for instruction latencies	Arnold Schwaighofer	2013-09-30
*	R600: Don't use trans slot for instructions that read LDS source registers	Tom Stellard	2013-09-12
*	R600: Add support for local memory atomic add	Tom Stellard	2013-09-05
*	R600: Use SchedModel enum for is{Trans,Vector}Only functions	Vincent Lejeune	2013-09-04
*	R600: Add IsExport bit to TableGen instruction definitions	Tom Stellard	2013-08-16
*	Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"	Tom Stellard	2013-07-31
*	R600: Use SchedModel enum for is{Trans,Vector}Only functions	Vincent Lejeune	2013-07-31
*	R600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISel::Select()	Tom Stellard	2013-07-23
*	R600: Support schedule and packetization of trans-only inst	Vincent Lejeune	2013-06-29
*	R600: Bank Swizzle now display SCL equivalent	Vincent Lejeune	2013-06-29
*	R600: Add local memory support via LDS	Tom Stellard	2013-06-28
*	R600: Add support for GROUP_BARRIER instruction	Tom Stellard	2013-06-28
*	R600: Use new getNamedOperandIdx function generated by TableGen	Tom Stellard	2013-06-25
*	R600: Rework subtarget info and remove AMDILDevice classes	Tom Stellard	2013-06-07
*	R600: Const/Neg/Abs can be folded to dot4	Vincent Lejeune	2013-06-04
*	R600: Relax some vector constraints on Dot4.	Vincent Lejeune	2013-05-17
*	R600: Some factorization	Vincent Lejeune	2013-05-17
*	R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips	Vincent Lejeune	2013-04-30
*	R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions	Vincent Lejeune	2013-04-30
*	R600: Factorize maximum alu per clause in a single location	Vincent Lejeune	2013-04-03
*	R600: Factorize code handling Const Read Port limitation	Vincent Lejeune	2013-03-14
*	R600: Support for indirect addressing v4	Tom Stellard	2013-02-06
*	Resort the #include lines in include/... and lib/... with the	Chandler Carruth	2013-01-02
*	Add R600 backend	Tom Stellard	2012-12-11