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path: root/lib/Target/R600/SIIntrinsics.td
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* R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcodeTom Stellard2013-05-06
| | | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181269 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add intrinsic for texture image loadingTom Stellard2013-05-06
| | | | | | | | | Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181267 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: remove image sample writemaskChristian Konig2013-04-10
| | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179164 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: mark most intrinsics as readnone v2Christian Konig2013-03-26
| | | | | | | | | | They read from constant register space anyway. v2: fix lit tests Signed-off-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178020 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: replace WQM intrinsicChristian Konig2013-03-26
| | | | | | | | Just enable WQM when we see an LDS interpolation instruction. Signed-off-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178019 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: implement SI.load.const intrinsicChristian Konig2013-03-18
| | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177273 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: rework input interpolation v2Christian Konig2013-03-07
| | | | | | | | | v2: update CMakeLists.txt as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176626 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: remove SI_vs_load_buffer_indexChristian Konig2013-03-07
| | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176625 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: switch types of SGPRs to v*i8Christian Konig2013-03-07
| | | | | | | Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176621 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Make sample intrinsic address parameter type overloaded.Tom Stellard2013-02-07
| | | | | | | | | | | | | | Handle vectors of 1 to 16 integers. Change the intrinsic names to prevent the wrong one from being selected at runtime due to the overloading. Patch By: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174633 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Take target parameter for sample intrinsics.Tom Stellard2013-01-21
| | | | | | | | | | Patch by: Michel Dänzer Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173052 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Derive all sample intrinsics from a single class.Tom Stellard2013-01-21
| | | | | | | | | | Patch by: Michel Dänzer Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173051 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: New control flow for SI v2Tom Stellard2012-12-19
| | | | | | | | | | | | | | | | | | | | | This patch replaces the control flow handling with a new pass which structurize the graph before transforming it to machine instruction. This has a couple of different advantages and currently fixes 20 piglit tests without a single regression. It is now a general purpose transformation that could be not only be used for SI/R6xx, but also for other hardware implementations that use a form of structurized control flow. v2: further cleanup, fixes and documentation Patch by: Christian König Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591 91177308-0d34-0410-b5e6-96231b3b80d8
* Add R600 backendTom Stellard2012-12-11
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
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