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	Commit message (Collapse)	Author	Age
*	[SystemZ] Add disassembler support	Richard Sandiford	2013-05-14
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181777 91177308-0d34-0410-b5e6-96231b3b80d8
*	[SystemZ] Add back end	Ulrich Weigand	2013-05-06
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This adds the actual lib/Target/SystemZ target files necessary to implement the SystemZ target. Note that at this point, the target cannot yet be built since the configure bits are missing. Those will be provided shortly by a follow-on patch. This version of the patch incorporates feedback from reviews by Chris Lattner and Anton Korobeynikov. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181203 91177308-0d34-0410-b5e6-96231b3b80d8
*	Remove the SystemZ backend.	Dan Gohman	2011-10-24
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142878 91177308-0d34-0410-b5e6-96231b3b80d8
*	Next round of MC refactoring. This patch factor MC table instantiations, MC	Evan Cheng	2011-07-14
\| \| \| \| \| \| \|	registeration and creation code into XXXMCDesc libraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
*	Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.	Evan Cheng	2011-07-01
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
*	Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc	Evan Cheng	2011-06-28
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
*	Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc	Evan Cheng	2011-06-27
\| \| \| \| \| \| \|	into XXXGenRegisterInfo.inc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8
*	Starting to refactor Target to separate out code that's needed to fully describe	Evan Cheng	2011-06-24
\| \| \| \| \| \| \| \| \| \| \| \| \|	target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
*	move all the target's asmprinters into the main target. The piece	Chris Lattner	2010-11-14
\| \| \| \| \| \| \| \| \|	that should be split out is the InstPrinter (if a target is mc'ized). This change makes all the targets be consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8
*	make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.	Chris Lattner	2010-01-24
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94378 91177308-0d34-0410-b5e6-96231b3b80d8
*	Stop building RTTI information for most llvm libraries. Notable	Chris Lattner	2010-01-22
\| \| \| \| \| \| \| \| \| \| \| \| \|	missing ones are libsupport, libsystem and libvmcore. libvmcore is currently blocked on bugpoint, which uses EH. Once it stops using EH, we can switch it off. This #if 0's out 3 unit tests, because gtest requires RTTI information. Suggestions welcome on how to fix this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94164 91177308-0d34-0410-b5e6-96231b3b80d8
*	Unbreak	Anton Korobeynikov	2009-07-16
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76064 91177308-0d34-0410-b5e6-96231b3b80d8
*	Let's start another backend :)	Anton Korobeynikov	2009-07-16
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75909 91177308-0d34-0410-b5e6-96231b3b80d8