| Commit message (Expand) | Author | Age |
|---|
| * | Fix section relocation for SECTIONREL32 with immediate offset. | Rafael Espindola | 2013-04-25 |
| * | Add CLAC/STAC instruction encoding/decoding support | Michael Liao | 2013-04-11 |
| * | In the X86 back end, getMemoryOperandNo() returns the offset | Preston Gurd | 2013-04-10 |
| * | x86 -- add the XTEST instruction | Dave Zarzycki | 2013-03-25 |
| * | Add X86 code emitter support AVX encoded MRMDestReg instructions. | Craig Topper | 2013-03-16 |
| * | Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit ... | Craig Topper | 2013-03-14 |
| * | Add support of RTM from TSX extension | Michael Liao | 2012-11-08 |
| * | Add register encoding support in X86 backend | Michael Liao | 2012-10-04 |
| * | Remove code for setting the VEX L-bit as a function of operand size from the ... | Craig Topper | 2012-09-19 |
| * | Use LLVM_DELETED_FUNCTION in place of 'DO NOT IMPLEMENT' comments. | Craig Topper | 2012-09-15 |
| * | Update GATHER instructions to support 2 read-write operands. Patch from mysel... | Craig Topper | 2012-07-12 |
| * | X86: add GATHER intrinsics (AVX2) in LLVM | Manman Ren | 2012-06-26 |
| * | Added FMA3 Intel instructions. | Elena Demikhovsky | 2012-05-31 |
| * | Add intrinsics, code gen, assembler and disassembler support for the SSE4a ex... | Benjamin Kramer | 2012-05-29 |
| * | Tidy up some spacing and inconsistent use of pre/post increment. No functiona... | Craig Topper | 2012-05-19 |
| * | Allow MCCodeEmitter access to the target MCRegisterInfo. | Jim Grosbach | 2012-05-15 |
| * | Put Is64BitMemOperand into !defined(NDEBUG) for now. | Joerg Sonnenberger | 2012-03-21 |
| * | Fix generation of the address size override prefix. Add assertions for | Joerg Sonnenberger | 2012-03-21 |
| * | Add vmfunc instruction to X86 assembler and disassembler. | Craig Topper | 2012-02-19 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 |
| * | Add X86 assembler and disassembler support for AMD SVM instructions. Original... | Craig Topper | 2012-02-18 |
| * | Add support for implicit TLS model used with MS VC runtime. | Anton Korobeynikov | 2012-02-11 |
| * | Convert assert(0) to llvm_unreachable in X86 Target directory. | Craig Topper | 2012-02-05 |
| * | Keep source location information for X86 MCFixup's. | Jim Grosbach | 2012-01-27 |
| * | Separate the concept of having memory access in operand 4 from the concept of... | Craig Topper | 2011-12-30 |
| * | XOP encoding bits and logic. | Jan Sjödin | 2011-12-12 |
| * | Handle expressions of the form _GLOBAL_OFFSET_TABLE_-symbol the same way gas | Rafael Espindola | 2011-12-10 |
| * | Src2 and src3 were accidentally swapped for the FMA4 rr patterns. Undo this a... | Jan Sjödin | 2011-12-08 |
| * | This patch contains support for encoding FMA4 instructions and | Bruno Cardoso Lopes | 2011-11-25 |
| * | Add X86 RORX instruction | Craig Topper | 2011-10-23 |
| * | Add X86 PEXTR and PDEP instructions. | Craig Topper | 2011-10-16 |
| * | Add X86 BZHI instruction as well as BMI2 feature detection. | Craig Topper | 2011-10-16 |
| * | Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3... | Craig Topper | 2011-10-16 |
| * | Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ... | Craig Topper | 2011-10-15 |
| * | Tidy up a bit more, fix tab and remove trailing whitespaces | Bruno Cardoso Lopes | 2011-09-20 |
| * | Tidy up code! | Bruno Cardoso Lopes | 2011-09-20 |
| * | Re-write part of VEX encoding logic, to be more easy to read! Also fix | Bruno Cardoso Lopes | 2011-08-19 |
| * | Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the | Bruno Cardoso Lopes | 2011-08-19 |
| * | Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. | Evan Cheng | 2011-07-27 |
| * | Explicitly cast narrowing conversions inside {}s that will become errors in | Jeffrey Yasskin | 2011-07-27 |
| * | More refactoring. | Evan Cheng | 2011-07-25 |
