| Commit message (Expand) | Author | Age |
|---|
| * | Add disassembler support for long encodings for INC/DEC in 32-bit mode. | Craig Topper | 2013-10-07 |
| * | Adds support for Atom Silvermont (SLM) - -march=slm | Preston Gurd | 2013-09-13 |
| * | Changed register names (and pointer keywords) to be lower case when using Int... | Craig Topper | 2013-07-31 |
| * | Fix IMULX machine model. Multiple def operands require multiple SchedWrites. | Andrew Trick | 2013-06-21 |
| * | Correct the def registers for the 8bit x86 divide instructions to | Eric Christopher | 2013-06-11 |
| * | X86: Fix Defs/Uses for insts that imp-def/imp-use both an A-register and EFLAGS. | Ahmed Bougacha | 2013-05-29 |
| * | Annotate the remaining x86 instructions with SchedRW lists. | Jakob Stoklund Olesen | 2013-03-26 |
| * | Annotate remaining IIC_BIN_* instructions. | Jakob Stoklund Olesen | 2013-03-20 |
| * | Annotate X86 arithmetic instructions with SchedRW lists. | Jakob Stoklund Olesen | 2013-03-18 |
| * | added basic support for Intel ADX instructions | Kay Tiong Khoo | 2013-02-14 |
| * | Two changes relevant to LEA and x32: | David Sehr | 2013-02-01 |
| * | Remove # from the beginning and end of def names. | Craig Topper | 2013-01-07 |
| * | Recommit r171461 which was incorrectly reverted. Mark DIV/IDIV instructions h... | Craig Topper | 2013-01-05 |
| * | Revert "Mark DIV/IDIV instructions hasSideEffects=1 because they can trap whe... | Michael Gottesman | 2013-01-03 |
| * | Mark DIV/IDIV instructions hasSideEffects=1 because they can trap when dividi... | Craig Topper | 2013-01-03 |
| * | Mark the divide instructions as hasSideEffects=0. | Craig Topper | 2012-12-27 |
| * | Add hasSideEffects=0 to CMP*rr_REV. | Craig Topper | 2012-12-27 |
| * | Mark the AL/AX/EAX forms of the basic arithmetic operations has never having ... | Craig Topper | 2012-12-26 |
| * | Mark all the _REV instructions as not having side effects. They aren't really... | Craig Topper | 2012-12-26 |
| * | Simplify BMI ANDN matching to use patterns instead of a DAG combine. Also add... | Craig Topper | 2012-12-17 |
| * | X86: enable CSE between CMP and SUB | Manman Ren | 2012-08-08 |
| * | X86: remove redundant cmp against zero. | Manman Ren | 2012-07-18 |
| * | X86: peephole optimization to remove cmp instruction | Manman Ren | 2012-07-06 |
| * | Revert r157831 | Manman Ren | 2012-06-03 |
| * | X86: peephole optimization to remove cmp instruction | Manman Ren | 2012-06-01 |
| * | This patch adds X86 instruction itineraries, which were missed by the | Preston Gurd | 2012-04-09 |
| * | Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,... | Jia Liu | 2012-02-18 |
| * | Instruction scheduling itinerary for Intel Atom. | Andrew Trick | 2012-02-01 |
| * | Add X86 MULX instruction for disassembler. | Craig Topper | 2011-10-23 |
| * | Remove some duplicate specifying of neverHasSideEffects and mayLoad from X86 ... | Craig Topper | 2011-10-22 |
| * | Add X86 ANDN instruction. Including instruction selection. | Craig Topper | 2011-10-14 |
| * | Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies. | Jakob Stoklund Olesen | 2011-10-08 |
| * | Fix some Intel syntax disassembly issues with instructions that implicitly us... | Craig Topper | 2011-10-02 |
| * | Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SB... | Craig Topper | 2011-09-11 |
| * | Fix a ton of comment typos found by codespell. Patch by | Chris Lattner | 2011-04-15 |
| * | Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which | Chris Lattner | 2010-12-20 |
| * | it turns out that when ".with.overflow" intrinsics were added to the X86 | Chris Lattner | 2010-12-05 |
| * | fix a subtle bug I introduced in my refactoring, where we stopped preferring | Chris Lattner | 2010-10-08 |
| * | convert test to use the existing classes that the multipatterns | Chris Lattner | 2010-10-07 |
| * | convert cmp to use a multipattern | Chris Lattner | 2010-10-07 |
| * | reduce redundancy between pattern copies. | Chris Lattner | 2010-10-07 |
| * | the opcode for BinOpMI/BinOpMI8 is always the same, remove the argument. | Chris Lattner | 2010-10-07 |
| * | convert adc/sbb to a multipattern. Because the adde/sube nodes | Chris Lattner | 2010-10-07 |
| * | add support for isConvertibleToThreeAddress to ArithBinOpEFLAGS, | Chris Lattner | 2010-10-07 |
| * | Fix a few issues in ArithBinOpEFLAGS that made it specific to and. | Chris Lattner | 2010-10-07 |
| * | Convert 'and' to single instance of a multipattern | Chris Lattner | 2010-10-07 |
| * | add a new BinOpAI class to represent the immediate form that directly acts on... | Chris Lattner | 2010-10-07 |
| * | add a bunch of classes for other common patterns. | Chris Lattner | 2010-10-07 |
| * | Define a new BinOpRI8 class and use it to define the imm8 versions of and. | Chris Lattner | 2010-10-07 |
| * | add the pattern operator to match to X86TypeInfo, use this to | Chris Lattner | 2010-10-07 |
