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path: root/lib/Target/X86/X86InstrFormats.td
Commit message (Expand)AuthorAge
* Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. Thi...Craig Topper2013-10-09
* AVX-512: Added TB prefix to all instructions without prefixes,Elena Demikhovsky2013-10-02
* Adding intrinsics to the llvm backend for TBM instruction set.Yunzhong Gao2013-09-27
* Adds support for Atom Silvermont (SLM) - -march=slmPreston Gurd2013-09-13
* AVX-512: Added VMOVD, VMOVQ, VMOVSS, VMOVSD instructions.Elena Demikhovsky2013-08-18
* Added encoding prefixes for KNL instructions (EVEX).Elena Demikhovsky2013-07-28
* Fix the move to/from accumulator register instructions that use a full 64-bitKevin Enderby2013-07-22
* Removed PackedDouble domain from scalar instructions. Added more formats for ...Elena Demikhovsky2013-06-09
* removed commented linesElena Demikhovsky2013-05-21
* Removed SSEPacked domain from all forms (AVX, SSE, signed, unsigned) scalar c...Elena Demikhovsky2013-05-21
* Add CLAC/STAC instruction encoding/decoding supportMichael Liao2013-04-11
* Add the X86 FMAs to the scheduling model.Nadav Rotem2013-03-28
* Remove IIC_DEFAULT from X86Schedule.tdJakob Stoklund Olesen2013-03-25
* x86 -- add the XTEST instructionDave Zarzycki2013-03-25
* X86: Make sure we account for the FMA4 register immediate value, otherwise ri...Benjamin Kramer2013-01-22
* Fix execution domain for packed FMA4 instructions.Craig Topper2012-11-21
* Add support of RTM from TSX extensionMichael Liao2012-11-08
* Introduce 'UseSSEx' to force SSE legacy encodingMichael Liao2012-08-30
* Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1.Craig Topper2012-07-30
* Make CVTDQ2PS instruction use SSE2 predicate instead of SSE1. No functional c...Craig Topper2012-06-23
* Move CVTPD2DQ to use SSE2 predicate instead of SSE3. Move DQ2PD and PD2DQ to ...Craig Topper2012-06-23
* Mark several instructions SSE2 instead of SSE3 as they should be.Craig Topper2012-06-06
* Rename FMA3 feature flag to just FMA to match gcc so it can be added to clang.Craig Topper2012-06-03
* X86: Rename the CLMUL target feature to PCLMUL.Benjamin Kramer2012-05-31
* Added X86 Atom latencies to X86InstrMMX.td.Preston Gurd2012-05-11
* This patch continues the work of adding instruction latencies for X86 Atom,Preston Gurd2012-05-02
* Remove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES ...Craig Topper2012-05-01
* Add vmfunc instruction to X86 assembler and disassembler.Craig Topper2012-02-19
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-18
* Add X86 assembler and disassembler support for AMD SVM instructions. Original...Craig Topper2012-02-18
* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-01
* Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate...Craig Topper2012-01-10
* Don't disable MMX support when AVX is enabled. Fix predicates for MMX instruc...Craig Topper2012-01-09
* Allow CRC32 instructions to be selected when AVX is enabled.Craig Topper2012-01-01
* Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is...Craig Topper2012-01-01
* Separate the concept of having memory access in operand 4 from the concept of...Craig Topper2011-12-30
* Fix execution domains for PS/PD FMA3 instructions. Add SS/SD forms o FMA3 ins...Craig Topper2011-12-29
* Mark non-VEX forms of PCLMUL instructions as requiring SSE2 to be enabled alo...Craig Topper2011-12-29
* Mark non-VEX forms of AES instructions as requiring SSE2 to be enabled along ...Craig Topper2011-12-29
* Make sure we correctly note the existence of an i8 immediate for vblendvps an...Eli Friedman2011-12-15
* XOP instructions and encoding tests.Jan Sjödin2011-12-12
* XOP encoding bits and logic.Jan Sjödin2011-12-12
* Remove hasSSE1orAVX(). It's the same as hasXMM().Evan Cheng2011-12-09
* Many of the SSE patterns should not be selected when AVX is available. This l...Evan Cheng2011-12-08
* This patch contains support for encoding FMA4 instructions andBruno Cardoso Lopes2011-11-25
* More AVX2 instructions and their intrinsics.Craig Topper2011-11-06
* Add more AVX2 instructions and intrinsics.Craig Topper2011-11-06
* Add X86 RORX instructionCraig Topper2011-10-23
* Add X86 PEXTR and PDEP instructions.Craig Topper2011-10-16
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-16