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path: root/lib/Target/X86/X86InstrXOP.td
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* Merge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into a 2-bit 'encoding' field ↵Craig Topper2014-02-02
| | | | | | in TSFlags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200624 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XOP disassembler support. Fixes PR13933.Craig Topper2013-10-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191874 91177308-0d34-0410-b5e6-96231b3b80d8
* Add explicit VEX_L tags to all 256-bit instructions. This will allow us to ↵Craig Topper2012-09-19
| | | | | | remove code from the code emitters that examined operands to set the L-bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164202 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix intrinsics for XOP frczss/sd instructions. These instructions only take ↵Craig Topper2012-06-13
| | | | | | one source register and zero the upper bits of the destination rather than preserving them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158396 91177308-0d34-0410-b5e6-96231b3b80d8
* Add intrinsics for immediate form of XOP vprot instructions. Use i128mem ↵Craig Topper2012-06-10
| | | | | | instead of f128mem for integer XOP instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158291 91177308-0d34-0410-b5e6-96231b3b80d8
* Use XOP vpcom intrinsics in patterns instead of a target specific SDNode ↵Craig Topper2012-06-09
| | | | | | type. Remove the custom lowering code that selected the SDNode type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158279 91177308-0d34-0410-b5e6-96231b3b80d8
* some comment fix for X86 and ARMJia Liu2012-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150902 91177308-0d34-0410-b5e6-96231b3b80d8
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-18
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove most of the intrinsics for XOP VPCMOV instruction. They all aliased ↵Craig Topper2012-02-05
| | | | | | to the same instruction with different types. This would be better accomplished with casts in the not yet created xopintrin.h header file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149795 91177308-0d34-0410-b5e6-96231b3b80d8
* Move some XOP patterns into instruction definition. Replae VPCMOV intrinsic ↵Craig Topper2012-01-30
| | | | | | patterns with custom lowering to a target specific nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149216 91177308-0d34-0410-b5e6-96231b3b80d8
* Add HasXOP predicate check covering a bunch of XOP intrinsic patterns.Craig Topper2012-01-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149054 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XOP Intrinsics and testsJan Sjödin2012-01-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147949 91177308-0d34-0410-b5e6-96231b3b80d8
* Add disassembler support for VPERMIL2PD and VPERMIL2PS.Craig Topper2011-12-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147368 91177308-0d34-0410-b5e6-96231b3b80d8
* Separate the concept of having memory access in operand 4 from the concept ↵Craig Topper2011-12-30
| | | | | | of having the W bit set for XOP instructons. Removes ORing W-bits in the encoder and will similarly simplify the disassembler implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147366 91177308-0d34-0410-b5e6-96231b3b80d8
* XOP instructions and encoding tests.Jan Sjödin2011-12-12
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146407 91177308-0d34-0410-b5e6-96231b3b80d8