| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | Mark the x86 machine model as incomplete. PR17367. | Andrew Trick | 2013-09-25 |
| * | Fix IMULX machine model. Multiple def operands require multiple SchedWrites. | Andrew Trick | 2013-06-21 |
| * | Support BufferSize on ProcResGroup for unified MOp schedulers. | Andrew Trick | 2013-06-15 |
| * | Update machine models. Specify buffer sizes for OOO processors. | Andrew Trick | 2013-06-15 |
| * | Machine Model: Add MicroOpBufferSize and resource BufferSize. | Andrew Trick | 2013-06-15 |
| * | X86 machine model: reduce SandyBridge and Haswell ILPWindow. | Andrew Trick | 2013-04-13 |
| * | The divide unit is not pipeline, but it is still buffered. | Andrew Trick | 2013-04-02 |
| * | Add the Haswell machine model. | Nadav Rotem | 2013-03-28 |
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index : llvm | |
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