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path: root/lib/Target/X86/X86Subtarget.h
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* Instruction scheduling itinerary for Intel Atom.Andrew Trick2012-02-01
* Remove hasXMM/hasXMMInt functions. Move callers to hasSSE1/hasSSE2. This is t...Craig Topper2012-01-10
* Remove hasSSE*orAVX functions and change all callers to use just hasSSE*. AVX...Craig Topper2012-01-10
* Instruction selection priority fixes to remove the XMM/XMMInt/orAVX predicate...Craig Topper2012-01-10
* Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. Pr...Craig Topper2012-01-09
* Remove hasSSE1orAVX(). It's the same as hasXMM().Evan Cheng2011-12-09
* Many of the SSE patterns should not be selected when AVX is available. This l...Evan Cheng2011-12-08
* Add XOP feature flag.Jan Sjödin2011-12-02
* Add methods for querying minimum SSE version along with AVX. Simplifies all t...Craig Topper2011-11-22
* Add intrinsics and feature flag for read/write FS/GS base instructions. Also ...Craig Topper2011-10-30
* Remove NaClModeDavid Meyer2011-10-18
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-16
* Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper2011-10-14
* Revert r141854 because it was causing failures:Bill Wendling2011-10-13
* Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper2011-10-13
* Add X86 LZCNT instruction. Including instruction selection support.Craig Topper2011-10-11
* Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disa...Craig Topper2011-10-09
* Add support for MOVBE and RDRAND instructions for the assembler and disassemb...Craig Topper2011-10-03
* Add a new MC bit for NaCl (Native Client) mode. NaCl requires that certainNick Lewycky2011-09-05
* Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.Eli Friedman2011-08-26
* X86Subtarget.h: Assume "x86_64-cygwin", though it has not been released yet, ...NAKAMURA Takumi2011-07-20
* Restore old behavior. Always auto-detect features unless cpu or features are ...Evan Cheng2011-07-08
* Add Mode64Bit feature and sink it down to MC layer.Evan Cheng2011-07-07
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-07
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-01
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-01
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-01
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-30
* Remove TargetOptions.h dependency from X86Subtarget.Evan Cheng2011-06-23
* ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()Daniel Dunbar2011-04-19
* Target/X86: Eliminate uses of getDarwinVers().Daniel Dunbar2011-04-19
* Target/X86: Add getTargetTriple() accessor.Daniel Dunbar2011-04-19
* Stack alignment is 16 bytes on FreeBSD/i386 too.Roman Divacky2011-02-22
* The stack should be 16 byte aligned on 32 bit solaris. Patch by Yuri.Duncan Sands2011-02-21
* Triple::MinGW64 is deprecated and removed. We can use Triple::MinGW32 generally.NAKAMURA Takumi2011-02-17
* Fix whitespace.NAKAMURA Takumi2011-02-17
* Patches to build EFI with Clang/LLVM. By Carl Norum.Evan Cheng2011-02-01
* Formalize the notion that AVX and SSE are non-overlapping extensions from the...Nate Begeman2010-12-10
* Add patterns for the x86 popcnt instruction.Benjamin Kramer2010-12-04
* Jim Asked us to move DataLayout on ARM back to the most specialized classes. DoRafael Espindola2010-10-03
* X86Subtarget.h: Fix Cygwin's TD.NAKAMURA Takumi2010-09-18
* Properly emit __chkstk call instead of __alloca on non-mingw windows targets.Anton Korobeynikov2010-09-02
* Add x86 CLMUL (Carry-less multiplication) cpu featureBruno Cardoso Lopes2010-07-23
* Have the X86 backend use Triple instead of a string and some enums.Eric Christopher2010-07-05
* FastISel doesn't yet handle callee-pop functions.Dan Gohman2010-05-27
* Enable i16 to i32 promotion by default.Evan Cheng2010-04-28
* isel (i32 anyext i16) as insert_subreg when 16-bit ops are being promoted.Evan Cheng2010-04-21
* Separate out the AES-NI instructions from the SSE4.2 instructions. AddEric Christopher2010-04-02
* Nehalem unaligned memory access is fast.Evan Cheng2010-04-01
* Turning off post-ra scheduling for x86. It isn't a consistent win.Evan Cheng2010-03-18
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