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* Revert changing FNEG of v4f32 to Expand. It's legal.Craig Topper2012-11-15
* Make FNEG and FABS of v4f32 Expand.Craig Topper2012-11-15
* Make a bunch of floating point operations on vectors Expand so that instructi...Craig Topper2012-11-15
* Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics.Craig Topper2012-11-15
* Remove unneeded #includes.Jakub Staszak2012-11-14
* NVPTXISelLowering.cpp: Fix warnings. [-Wunused-variable]NAKAMURA Takumi2012-11-14
* Remove the CellSPU port.Eric Christopher2012-11-14
* Fix invalid asserts, use llvm_unreachable instead.Jakub Staszak2012-11-14
* Added multiclass for post-increment load instructions.Jyotsna Verma2012-11-14
* X86: Enable SSE memory intrinsics even when stack alignment is less than 16 b...Benjamin Kramer2012-11-14
* The code pattern "imm0_255_neg" is used for checking if an immediate value is...Nadav Rotem2012-11-14
* [NVPTX] Implement custom lowering of loads/stores for i1Justin Holewinski2012-11-14
* X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.Jim Grosbach2012-11-14
* Set FFLOOR of vectors to expand to keep intruction selection from failing.Craig Topper2012-11-14
* Factor out an overly replicated typecast. No functional change.Craig Topper2012-11-14
* Set FFLOOR for vectors to expand on CellSPU to keep instruction selection fro...Craig Topper2012-11-14
* Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov2012-11-14
* Add (some) PowerPC TLS relocation types to ELF.h andUlrich Weigand2012-11-13
* Fix wrong PowerPC instruction opcodes for:Ulrich Weigand2012-11-13
* Fix wrong PowerPC instruction encodings due toUlrich Weigand2012-11-13
* Fix instruction encoding for "bd(n)z" on PowerPC,Ulrich Weigand2012-11-13
* Fix instruction encoding for "isel" on PowerPC,Ulrich Weigand2012-11-13
* X86: when constructing VZEXT_LOAD from other loads, makes sure its outputManman Ren2012-11-13
* misched: Allow subtargets to enable misched and dependent options.Andrew Trick2012-11-13
* Test commit.Jyotsna Verma2012-11-13
* misched: Target-independent support for load/store clustering.Andrew Trick2012-11-12
* Make TOC order deterministic by using MapVector instead of DenseMap.Ulrich Weigand2012-11-12
* Remove unused field.Eric Christopher2012-11-12
* Fix PR14314Michael Liao2012-11-12
* [NVPTX] Add more precise PTX/SM target attributesJustin Holewinski2012-11-12
* Move some helper methods to being static functions in the implementation file.Craig Topper2012-11-11
* Use the isTruncFree and isZExtFree API to figure out of these operations are ...Nadav Rotem2012-11-11
* Remove unnecessary subtraction and addition by 1 around a couple for loops.Craig Topper2012-11-10
* Tidy up spacing. No functional change.Craig Topper2012-11-10
* Removed unimplemented method declaration.Craig Topper2012-11-10
* Simplify custom emitter code for pcmp(e/i)str(i/m) and make the helper functi...Craig Topper2012-11-10
* Add more functions to the target library information.Meador Inge2012-11-10
* Disable the Thumb no-return call optimization:Evan Cheng2012-11-10
* Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.Craig Topper2012-11-10
* [NVPTX] Use ABI alignment for parameters when alignment is not specified.Justin Holewinski2012-11-09
* Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.Anton Korobeynikov2012-11-09
* Switch FreeBSD/i386 back to 4byte stack alignment. This partiallyRoman Divacky2012-11-09
* Revert r167620; this can be implemented using an existing CL option.Chad Rosier2012-11-09
* Add support for -mstrict-align compiler option for ARM targets.Chad Rosier2012-11-09
* indentNadav Rotem2012-11-09
* Recommit modified r167540.Amara Emerson2012-11-08
* Add support of RTM from TSX extensionMichael Liao2012-11-08
* [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka2012-11-07
* Delete MipsFunctionInfo::NextStackOffset. No functionality change intended. Akira Hatanaka2012-11-07
* Revert r167540 until regression tests are updated.Amara Emerson2012-11-07