| Commit message (Expand) | Author | Age |
|---|
| ... | |
| * | Remove some duplicate specifying of neverHasSideEffects and mayLoad from X86 ... | Craig Topper | 2011-10-22 |
| * | Move various generated tables into read-only memory, fixing up const correctn... | Benjamin Kramer | 2011-10-22 |
| * | Fix pr11193. | Nadav Rotem | 2011-10-22 |
| * | The different flavors of ARM have different valid subsets of registers. Check | Bill Wendling | 2011-10-22 |
| * | Assembly parsing for 4-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 |
| * | Assembly parsing for 2-register sequential variant of VLD2. | Jim Grosbach | 2011-10-21 |
| * | Assembly parsing for 4-register variant of VLD1. | Jim Grosbach | 2011-10-21 |
| * | Assembly parsing for 3-register variant of VLD1. | Jim Grosbach | 2011-10-21 |
| * | ARM VLD parsing and encoding. | Jim Grosbach | 2011-10-21 |
| * | Don't automatically set the "fc" bits on MSR instructions if the user didn't ... | Owen Anderson | 2011-10-21 |
| * | Nuke an #if0 that got accidentally left in. | Jim Grosbach | 2011-10-21 |
| * | whitespace. | Jim Grosbach | 2011-10-21 |
| * | Remove some outdated comments. | Jim Grosbach | 2011-10-21 |
| * | Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ... | Craig Topper | 2011-10-21 |
| * | Fix unused variable warning. | Richard Smith | 2011-10-21 |
| * | Revert r142618, r142622, and r142624, which were based on an incorrect readin... | Owen Anderson | 2011-10-20 |
| * | Disable the PPC hazard recognizer. It currently only supports | Dan Gohman | 2011-10-20 |
| * | Separate out ARM MSR instructions into M-class versions and AR-class versions... | Owen Anderson | 2011-10-20 |
| * | Add missing operand. <rdar://problem/10313323> | Bill Wendling | 2011-10-20 |
| * | Haven't yet found a nice way to handle TargetData verification in the | Lang Hames | 2011-10-20 |
| * | Tidy up. Trailing whitespace. | Jim Grosbach | 2011-10-20 |
| * | ARM VLD1/VST1 (one register, no writeback) assembly parsing and encoding. | Jim Grosbach | 2011-10-20 |
| * | ARM VTBX (one register) assembly parsing and encoding. | Jim Grosbach | 2011-10-20 |
| * | Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :( | Chad Rosier | 2011-10-20 |
| * | Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10... | Evan Cheng | 2011-10-19 |
| * | Use literal pool loads instead of MOVW/MOVT for materializing global addresse... | James Molloy | 2011-10-19 |
| * | Make sure we emit the 'movw' and 'movt' only if it's supported. Otherwise, us... | Bill Wendling | 2011-10-19 |
| * | Remove some dead code. | Bill Wendling | 2011-10-19 |
| * | Rename PEXTR to PEXT. Add intrinsics for BMI instructions. | Craig Topper | 2011-10-19 |
| * | Emit the MOVT instruction only if the # LPads is > 64K. | Bill Wendling | 2011-10-18 |
| * | For Thumb mode, we need to use a constant pool if the value is too large to be | Bill Wendling | 2011-10-18 |
| * | Revert "Turn on the vzeroupper pass by default." | Eric Christopher | 2011-10-18 |
| * | ARM VTBL (one register) assembly parsing and encoding. | Jim Grosbach | 2011-10-18 |
| * | Use the integer compare when the value is small enough. Use the "move into a | Bill Wendling | 2011-10-18 |
| * | Turn on the vzeroupper pass by default. | Eric Christopher | 2011-10-18 |
| * | Use the integer compare when the value is small enough. Use the "move into a | Bill Wendling | 2011-10-18 |
| * | Teach fast isel about vector stores, and make DoSelectCall return false when ... | Lang Hames | 2011-10-18 |
| * | The value we're comparing against may be too large for the ARM CMP | Bill Wendling | 2011-10-18 |
| * | The immediate may be too large for the CMP instruction. Move it into a register | Bill Wendling | 2011-10-18 |
| * | Yet more ARM NEON assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 |
| * | ARM vmla/vmls assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 |
| * | ARM vmov assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 |
| * | Use ARM/t2PseudoInst class from ARM/Thumb2 special adds/subs patterns. | Andrew Trick | 2011-10-18 |
| * | Use isIntN and isUIntN to check for valid signed/unsigned numbers. | Bob Wilson | 2011-10-18 |
| * | whitespace | Andrew Trick | 2011-10-18 |
| * | A landing pad could have more than one predecessor. In that case, we want that | Bill Wendling | 2011-10-18 |
| * | ARM vmla/vmls assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 |
| * | ARM vqdmulh assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 |
| * | ARM vmul assembly parsing for the lane index operand. | Jim Grosbach | 2011-10-18 |
| * | Final patch that completes old JIT support for Mips: | Bruno Cardoso Lopes | 2011-10-18 |
