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* [llvm-c] Make LLVMGetTargetFromName actually workPeter Zotov2013-11-15
| | | | | | LLVMGetTargetFromName used to compare two char* strings directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194771 91177308-0d34-0410-b5e6-96231b3b80d8
* [llvm-c] Add missing const qualifiers to LLVMCreateTargetMachinePeter Zotov2013-11-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194770 91177308-0d34-0410-b5e6-96231b3b80d8
* [llvm-c] Simplify signature of LLVMGetTargetFromNamePeter Zotov2013-11-15
| | | | | | | LLVMGetTargetFromName was not yet present in an LLVM release, so this does not break compatibility. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194769 91177308-0d34-0410-b5e6-96231b3b80d8
* Make all the conditional Mips 16 branches get initially set for theReed Kotler2013-11-15
| | | | | | | | | | | | short form. Constant islands will expand them if they are out of range. Since there is not direct object emitter at this time, it does not have any material affect because the assembler sorts this out. But we need to know for the actual constant island work. We track the difference by putting # 16 inst in the comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194766 91177308-0d34-0410-b5e6-96231b3b80d8
* Add addrspacecast instruction.Matt Arsenault2013-11-15
| | | | | | Patch by Michele Scandale! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194760 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix scheduling of instructions that use the LDS output queueTom Stellard2013-11-15
| | | | | | | | | | | | | | | | | | | | | | | | | The LDS output queue is accessed via the OQAP register. The OQAP register cannot be live across clauses, so if value is written to the output queue, it must be retrieved before the end of the clause. With the machine scheduler, we cannot statisfy this constraint, because it lacks proper alias analysis and it will mark some LDS accesses as having a chain dependency on vertex fetches. Since vertex fetches require a new clauses, the dependency may end up spiltting OQAP uses and defs so the end up in different clauses. See the lds-output-queue.ll test for a more detailed explanation. To work around this issue, we now combine the LDS read and the OQAP copy into one instruction and expand it after register allocation. This patch also adds some checks to the EmitClauseMarker pass, so that it doesn't end a clause with a value still in the output queue and removes AR.X and OQAP handling from the scheduler (AR.X uses and defs were already being expanded post-RA, so the scheduler will never see them). Reviewed-by: Vincent Lejeune <vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194755 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add processor type for HawaiiTom Stellard2013-11-14
| | | | | | | | | Patch by: Alex Deucher Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194752 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Remove redundant legalizeOperands callMatt Arsenault2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194749 91177308-0d34-0410-b5e6-96231b3b80d8
* Add #include raw_ostream.h in lib/Target/R600/SIFixSGPRCopies.cppHans Wennborg2013-11-14
| | | | | | This was casuing my release+asserts build on Windows to fail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194747 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Specify S_ADDK/S_MULK set SCC and are commutableMatt Arsenault2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194738 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Remove redundant Neon_immAllOnes/Neon_immAllZeros leaf patterns.Chad Rosier2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194733 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: produce friendly error for invalid inline asmTim Northover2013-11-14
| | | | | | | | | We used to perform an invalid operation on an MVT and crash, which wasn't much fun. Patch by Oliver Stannard. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194714 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: Handled extractelement from mask vector;Elena Demikhovsky2013-11-14
| | | | | | | Added VMOSHDUP/VMOVSLDUP shuffle instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194691 91177308-0d34-0410-b5e6-96231b3b80d8
* Indentation fixesMatt Arsenault2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194688 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a commentMatt Arsenault2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194684 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix trailing whitespace in debug printingMatt Arsenault2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194683 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64DAGToDAGISel::SelectVTBL(): Fix a warning. [-Wunused-variable]NAKAMURA Takumi2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194679 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor extension to llvm.experimental.patchpoint: don't require a call.Andrew Trick2013-11-14
| | | | | | | | If a null call target is provided, don't emit a dummy call. This allows the runtime to reserve as little nop space as it needs without the requirement of emitting a call. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194676 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't mangle \n and "Rafael Espindola2013-11-14
| | | | | | | | | | There is nothing special about quotes and newlines from the object file point of view, only the assembler has to worry about expanding the \n and \". This patch then removes the special handling from the Mangler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194667 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SIFixSGPRCopies.cpp: Fix \param to \return. [-Wdocumentation]NAKAMURA Takumi2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194662 91177308-0d34-0410-b5e6-96231b3b80d8
* Whitespace.NAKAMURA Takumi2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194661 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64 neon] support poly64 and relevant intrinsic functions.Kevin Qin2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194659 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement aarch64 neon instruction class SIMD misc.Kevin Qin2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194656 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 NEON instruction set AdvSIMD (table).Jiangning Liu2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194648 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix uninitialized variable usageTom Stellard2013-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194632 91177308-0d34-0410-b5e6-96231b3b80d8
* Take care of long short branch immediate instructions for mips16 inReed Kotler2013-11-13
| | | | | | | | constant islands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194630 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-13
| | | | | | | Private address space is emulated using the register file with MOVRELS and MOVRELD instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194626 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Prefer SALU instructions for bit shift operationsTom Stellard2013-11-13
| | | | | | | | | | | | | | All shift operations will be selected as SALU instructions and then if necessary lowered to VALU instructions in the SIFixSGPRCopies pass. This allows us to do more operations on the SALU which will improve performance and is also required for implementing private memory using indirect addressing, since the private memory pointers must stay in the scalar registers. This patch includes some fixes from Matt Arsenault. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194625 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for legacy AArch32 NEON scalar shift by immediateChad Rosier2013-11-13
| | | | | | | | instructions. This patch does not include the shift right and accumulate instructions. A number of non-overloaded intrinsics have been remove in favor of their overloaded counterparts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194598 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable generating legacy IT block for AArch32Weiming Zhao2013-11-13
| | | | | | | | | | | | | | | | By default, the behavior of IT block generation will be determinated dynamically base on the arch (armv8 vs armv7). This patch adds backend options: -arm-restrict-it and -arm-no-restrict-it. The former one restricts the generation of IT blocks (the same behavior as thumbv8) for both arches. The later one allows the generation of legacy IT block (the same behavior as ARMv7 Thumb2) for both arches. Clang will support -mrestrict-it and -mno-restrict-it, which is compatible with GCC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194592 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Add the general form of BCRRichard Sandiford2013-11-13
| | | | | | | At the moment this is just the MC support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194585 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove AllowQuotesInName and friends from MCAsmInfo.Rafael Espindola2013-11-13
| | | | | | | | | | | Accepting quotes is a property of an assembler, not of an object file. For example, ELF can support any names for sections and symbols, but the gnu assembler only accepts quotes in some contexts and llvm-mc in a few more. LLVM should not produce different symbols based on a guess about which assembler will be reading the code it is printing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194575 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bug in .gpword directive parsing.Vladimir Medic2013-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194570 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for microMIPS trap instruction with immediate operands.Zoran Jovanovic2013-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194569 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: implement exception handlingRobert Lytton2013-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194564 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch fixes a bug in floating point operands parsing, when instruction ↵Vladimir Medic2013-11-13
| | | | | | alias uses default register operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194562 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips16InstrInfo.cpp: Use <cctype> instead of <ctype.h>NAKAMURA Takumi2013-11-13
| | | | | | Also, prune <stdlib.h>, seems stray. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194557 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow the code which returns the length for inline assembler to knowReed Kotler2013-11-13
| | | | | | | | | | | specifically about the .space directive. This allows us to force large blocks of code to appear in test cases for things like constant islands without having to make giant test cases to force things like long branches to take effect. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194555 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix selection failure on EXTLOADMatt Arsenault2013-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194547 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.Juergen Ributzka2013-11-13
| | | | | | | | | | | | | | | | | | | | | | This patch reapplies r193676 with an additional fix for the Hexagon backend. The SystemZ backend has already been fixed by r194148. The Type Legalizer recognizes that VSELECT needs to be split, because the type is to wide for the given target. The same does not always apply to SETCC, because less space is required to encode the result of a comparison. As a result VSELECT is split and SETCC is unrolled into scalar comparisons. This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG Combiner. If a matching pattern is found, then the result mask of SETCC is promoted to the expected vector mask type for the given target. Now the type legalizer will split both VSELECT and SETCC. This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>. Reviewed by Nadav git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194542 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove always true flag.Rafael Espindola2013-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194530 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup the stackmap operand folding code and fix a corner case.Andrew Trick2013-11-12
| | | | | | | I still don't know how to refer to the fixed operands symbolically. I plan to look into it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194529 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix a bug in function CC_MipsO32_FP64. The second double precisionAkira Hatanaka2013-11-12
| | | | | | | | argument was not being passed in $f14. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194522 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a FIXME for 32-bit q modifiers.Eric Christopher2013-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194515 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: diagnose invalid system LDM/STMTim Northover2013-11-12
| | | | | | | | | | | | | The system LDM and STM instructions can't usually writeback to the base register. The one exception is when an LDM is actually an exception-return (i.e. contains PC in the register list). (There's already a test that "ldm sp!, {r0-r3, pc}^" works, which is why there is no positive test). rdar://problem/15223374 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194512 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Revert part of r194510 that was accidentally committed.Akira Hatanaka2013-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194511 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix and re-enable a test case that has been disabled for a long time.Akira Hatanaka2013-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194510 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalarChad Rosier2013-11-12
| | | | | | | | copy in MC layer. Added the MC layer tests. Fixed triple setting in test cases. Patch by Ana Pazos <apazos@codeaurora.org>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194501 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand rotate instructions on sparcv9 as well.Roman Divacky2013-11-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194500 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify operand folding when rematerializing a load.Andrew Trick2013-11-12
| | | | | | | | | | | | We already know how to fold a reload from a frameindex without analyzing the load instruction. Generalize this to handle any frameindex load. This streamlines the logic for rematerializing loads from stack arguments. As a side effect, it allows stackmaps to record a stack argument location without spilling it. Verified no effect on codegen for llvm test-suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194497 91177308-0d34-0410-b5e6-96231b3b80d8
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