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* Cleanup some SCEV logic a bit.Andrew Trick2013-03-19
* Tighten up an internal LSR API that should check for NULL.Andrew Trick2013-03-19
* Emit the linkage name instead of the function name, when available. This meansNick Lewycky2013-03-19
* Fix a sign-extension bug in PPCCTRLoopsHal Finkel2013-03-18
* Move #include of BitVector from .h to .cpp file.Jakub Staszak2013-03-18
* Add some constantness.Jakub Staszak2013-03-18
* Make method private. Keep coding standard.Jakub Staszak2013-03-18
* [ms-inline asm] Avoid emitting a redundant sizing directive, if we've alreadyChad Rosier2013-03-18
* Change NULL to 0.Jakub Staszak2013-03-18
* Register the flush function for each compile unit.Bill Wendling2013-03-18
* Fix PPC unaligned 64-bit loads and storesHal Finkel2013-03-18
* ARM cost model: Make some vector integer to float casts cheaperArnold Schwaighofer2013-03-18
* ARM cost model: Correct cost for some cheap float to integer conversionsArnold Schwaighofer2013-03-18
* Extend global merge pass to optionally consider global constant variables.Quentin Colombet2013-03-18
* Add SchedRW annotations to most of X86InstrSSE.td.Jakob Stoklund Olesen2013-03-18
* Annotate X86 arithmetic instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-18
* Check whether a pointer is non-null (isKnownNonNull) in isKnownNonZero.Manman Ren2013-03-18
* Fix 80-col. violations in PPCCTRLoopsHal Finkel2013-03-18
* Fix large count and negative constant count handling in PPCCTRLoopsHal Finkel2013-03-18
* Cleanup initial-value constants in PPCCTRLoopsHal Finkel2013-03-18
* Fix integer comparison in DIEInteger::BestForm.Hans Wennborg2013-03-18
* The optimization a + (-0.0f) -> a was being misapplied to a + (+0.0f) in the...David Tweed2013-03-18
* R600/SI: implement indirect adressing for SIChristian Konig2013-03-18
* R600/SI: add float vector typesChristian Konig2013-03-18
* R600/SI: add shl patternChristian Konig2013-03-18
* R600/SI: add BUFFER_LOAD_DWORD patternChristian Konig2013-03-18
* R600/SI: implement SI.load.const intrinsicChristian Konig2013-03-18
* R600/SI: enable all S_LOAD and S_BUFFER_LOAD opcodesChristian Konig2013-03-18
* R600/SI: fix inserting waits for all definesChristian Konig2013-03-18
* [asan] when creating string constants, set unnamed_attr and align 1 so that e...Kostya Serebryany2013-03-18
* Mark internal classes as POD-like to get better behavior out ofChandler Carruth2013-03-18
* TLS support for MinGW targets.Anton Korobeynikov2013-03-18
* Windows TLS: Section name prefix to ensure correct orderAnton Korobeynikov2013-03-18
* [asan] while generating the description of a global variable, emit the module...Kostya Serebryany2013-03-18
* [asan] don't instrument functions with available_externally linkage. This sav...Kostya Serebryany2013-03-18
* Post process ADC/SBB and use a shorter encoding if they use a sign extended i...Craig Topper2013-03-18
* Refactor some duplicated code into helper functions.Craig Topper2013-03-18
* Fix the build broken in r177239David Blaikie2013-03-17
* Split out filename & directory from DIFile to start generalizing over DIScopesDavid Blaikie2013-03-17
* To avoid symbol clash, undefine PPC here. PPC may be predefined on some hosts.Sylvestre Ledru2013-03-17
* Improve PPC VR (Altivec) register spillingHal Finkel2013-03-17
* Remove PPC avoidWriteAfterWrite callbackHal Finkel2013-03-16
* Change the default latency for implicit defs.Andrew Trick2013-03-16
* Add X86 code emitter support AVX encoded MRMDestReg instructions.Craig Topper2013-03-16
* Define more SchedWrites for annotating X86 instructions.Jakob Stoklund Olesen2013-03-16
* [Support][Path][Windows] Fix dangling else. Don't call CloseHandle when Close...Michael J. Spencer2013-03-15
* ARM cost model: Fix costs for some vector selectsArnold Schwaighofer2013-03-15
* Adding an A15 specific optimization pass for interactions between S/D/Q regis...Silviu Baranga2013-03-15
* ARM: Fix an old refacto.Benjamin Kramer2013-03-15
* Enable unaligned memory access on PPC for scalar typesHal Finkel2013-03-15
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