summaryrefslogtreecommitdiff
path: root/lib
Commit message (Expand)AuthorAge
...
* Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpoolAkira Hatanaka2011-11-16
* 64-bit jump register instruction.Akira Hatanaka2011-11-16
* Another missing X86ISD::MOVLPD pattern. rdar://10450317Evan Cheng2011-11-16
* ARM assembly parsing for shifted register operands for MOV instruction.Jim Grosbach2011-11-16
* Clean up debug printing of ARM shifted operands.Jim Grosbach2011-11-16
* Add fast-isel stats to determine who's doing all the work, the Chad Rosier2011-11-16
* Fix the stats collection for fast-isel. The failed count was only accountingChad Rosier2011-11-16
* ARM assmebly two operand forms for LSR, ASR, LSL, ROR register.Jim Grosbach2011-11-16
* ARM assembly parsing for RRX mnemonic.Jim Grosbach2011-11-16
* Added missing comment about new custom lowering of DEC64Pete Cooper2011-11-16
* Disable expensive two-address optimizations at -O0. rdar://10453055Evan Cheng2011-11-16
* Check to make sure we can select the instruction before trying to put theChad Rosier2011-11-16
* Disable the assertion again. Looks like fastisel is still generating bad kill...Evan Cheng2011-11-16
* ARM mode aliases for bitwise instructions w/ register operands.Jim Grosbach2011-11-16
* Fix tablegen warning: hasSideEffects is inferred for eh_sjlj_dispatchsetup.Bob Wilson2011-11-16
* lib/Target/ARM/CMakeLists.txt: Disable optimization in ARMISelLowering.cpp al...NAKAMURA Takumi2011-11-16
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-16
* Record landing pads with a SmallSetVector to avoid multiple entries.Bob Wilson2011-11-16
* Fix the execution domain on a bunch of SSE/AVX instructions.Craig Topper2011-11-16
* Update the SP in the SjLj jmpbuf whenever it changes. <rdar://problem/10444602>Bob Wilson2011-11-16
* Fix ARM SjLj-EH dispatch setup code. <rdar://problem/10444602>Bob Wilson2011-11-16
* Remove code to enable execution dependency fix pass on VR256. VR128 is suffic...Craig Topper2011-11-16
* Revert r144568 now that r144730 has fixed the fast-isel kill marker bug.Evan Cheng2011-11-16
* Merge isObjectPointerWithTrustworthySize with getPointerSize. Use it whenNick Lewycky2011-11-16
* If the 2addr instruction has other kills, don't move it below any other uses ...Evan Cheng2011-11-16
* RescheduleKillAboveMI() must backtrack to before the rescheduled DBG_VALUE in...Evan Cheng2011-11-16
* Process all uses first before defs to accurately capture register liveness. r...Evan Cheng2011-11-16
* CONCAT_VECTORS can have more than two operands. PR11389.Eli Friedman2011-11-16
* Add a couple asserts so it will be easier to debug if we accidentally pass in...Eli Friedman2011-11-16
* AddressSanitizer, first commit (compiler module only)Kostya Serebryany2011-11-16
* test commit to verify that commit access works (added blank line)Kostya Serebryany2011-11-16
* Rename MVT::untyped to MVT::Untyped to match similar nomenclature.Owen Anderson2011-11-16
* Fix SCEV overly optimistic back edge taken count for multi-exit loops.Andrew Trick2011-11-16
* Add FIXME comment.Chad Rosier2011-11-16
* Enable -widen-vmovs by default.Jakob Stoklund Olesen2011-11-15
* Stabilize the output of the dwarf accelerator tables. Fixes a comparisonEric Christopher2011-11-15
* GEPs with all zero indices are trivially coalesced by fast-isel. For example,Chad Rosier2011-11-15
* ARM assembly parsing for register range syntax for VLD/VST register lists.Jim Grosbach2011-11-15
* ARM assembly parsing for data type suffices on NEON VMOV aliases.Jim Grosbach2011-11-15
* Fix MSVC warnings by adding a cast. Nadav Rotem2011-11-15
* AVX: Add support for vbroadcast from BUILD_VECTOR and refactor some of the vb...Nadav Rotem2011-11-15
* ARM assembly parsing two operand forms for shift instructions.Jim Grosbach2011-11-15
* ARM VFP assembly parsing for VADD and VSUB two-operand forms.Jim Grosbach2011-11-15
* ARM accept an immediate offset in memory operands w/o the '#'.Jim Grosbach2011-11-15
* Added custom lowering for load->dec->store sequence in x86 when the EFLAGS re...Pete Cooper2011-11-15
* ARM enclosing curly braces optional on one-register VLD/VST instruction lists.Jim Grosbach2011-11-15
* ARM size suffix on VFP single-precision 'vmov' is optional.Jim Grosbach2011-11-15
* Insert modified DBG_VALUE into LiveDbgValueMap. Devang Patel2011-11-15
* Fix typo.Jim Grosbach2011-11-15
* ARM alternate size suffices for VTRN instructions.Jim Grosbach2011-11-15
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-14 02:10:41 +0000