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* Merge r196725 (conflicts on same API as before):Tim Northover2013-12-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196725 | tnorthover | 2013-12-08 15:56:50 +0000 (Sun, 08 Dec 2013) | 19 lines ARM: fix folding of stack-adjustment (yet again). When trying to eliminate an "sub sp, sp, #N" instruction by folding it into an existing push/pop using dummy registers, we need to account for the fact that this might affect precisely how "fp" gets set in the prologue. We were attempting this, but assuming that *whenever* we performed a fold it would make a difference. This is false, for example, in: push {r4, r7, lr} add fp, sp, #4 vpush {d8} sub sp, sp, #8 we can fold the "sub" into the "vpush", forming "vpush {d7, d8}". However, in that case the "add fp" instruction mustn't change, which we were getting wrong before. Should fix PR18160. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196769 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196751:Bill Wendling2013-12-09
| | | | | | | | | | | | | ------------------------------------------------------------------------ r196751 | venkatra | 2013-12-08 20:02:15 -0800 (Sun, 08 Dec 2013) | 3 lines [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196766 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196755:Bill Wendling2013-12-09
| | | | | | | | | | | | ------------------------------------------------------------------------ r196755 | venkatra | 2013-12-08 21:13:25 -0800 (Sun, 08 Dec 2013) | 2 lines [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196764 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196735:Bill Wendling2013-12-09
| | | | | | | | | | | | | ------------------------------------------------------------------------ r196735 | venkatra | 2013-12-08 14:06:07 -0800 (Sun, 08 Dec 2013) | 3 lines [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9. This fixes PR18150. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196744 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196493. Simple conflict due to change API of updatedTim Northover2013-12-08
| | | | | | | function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196717 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196638:Bill Wendling2013-12-08
| | | | | | | | | | | ------------------------------------------------------------------------ r196638 | arsenm | 2013-12-06 18:58:45 -0800 (Fri, 06 Dec 2013) | 1 line Fix assert with copy from global through addrspacecast ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196709 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196637:Bill Wendling2013-12-08
| | | | | | | | | | | ------------------------------------------------------------------------ r196637 | arsenm | 2013-12-06 18:58:41 -0800 (Fri, 06 Dec 2013) | 1 line Add getBitCastOrAddrSpaceCast ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196707 91177308-0d34-0410-b5e6-96231b3b80d8
* --- Reverse-merging r196668 into '.':Bill Wendling2013-12-08
| | | | | | | | | U lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp U test/Transforms/InstCombine/addrspacecast.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196705 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196588:Bill Wendling2013-12-08
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196588 | weimingz | 2013-12-06 09:56:48 -0800 (Fri, 06 Dec 2013) | 7 lines Bug 18149: [AArch32] VSel instructions has no ARMCC field The current peephole optimizing for compare inst assumes an instr that uses CPSR has an MO for ARM Cond code.However, for VSEL instructions (vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do they support the modification of Cond Code. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196704 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196533:Bill Wendling2013-12-08
| | | | | | | | | | | | | ------------------------------------------------------------------------ r196533 | apazos | 2013-12-05 13:07:49 -0800 (Thu, 05 Dec 2013) | 3 lines Implemented vget/vset_lane_f16 intrinsics ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196701 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196456:Bill Wendling2013-12-08
| | | | | | | | | | | | ------------------------------------------------------------------------ r196456 | jiangning | 2013-12-04 18:12:01 -0800 (Wed, 04 Dec 2013) | 2 lines For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196700 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196362:Bill Wendling2013-12-08
| | | | | | | | | | | ------------------------------------------------------------------------ r196362 | kevinqin | 2013-12-04 00:02:34 -0800 (Wed, 04 Dec 2013) | 1 line [AArch64 Neon] Add ACLE intrinsic vceqz_f64. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196699 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196360:Bill Wendling2013-12-08
| | | | | | | | | | | ------------------------------------------------------------------------ r196360 | kevinqin | 2013-12-03 23:53:28 -0800 (Tue, 03 Dec 2013) | 1 line [AArch64 NEON] Add missing compare intrinsics. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196697 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196208:Bill Wendling2013-12-08
| | | | | | | | | | | | | ------------------------------------------------------------------------ r196208 | haoliu | 2013-12-02 21:58:30 -0800 (Mon, 02 Dec 2013) | 3 lines AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions. E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196693 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196198:Bill Wendling2013-12-08
| | | | | | | | | | | | | ------------------------------------------------------------------------ r196198 | haoliu | 2013-12-02 19:39:47 -0800 (Mon, 02 Dec 2013) | 3 lines AArch64: Add missing scalar pair intrinsics. E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s". ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196691 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196192:Bill Wendling2013-12-08
| | | | | | | | | | | | ------------------------------------------------------------------------ r196192 | jiangning | 2013-12-02 17:33:52 -0800 (Mon, 02 Dec 2013) | 2 lines Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196690 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196190:Bill Wendling2013-12-08
| | | | | | | | | | | | ------------------------------------------------------------------------ r196190 | jiangning | 2013-12-02 17:29:32 -0800 (Mon, 02 Dec 2013) | 2 lines Add some missing pattern matches for AArch64 Neon intrinsics like vmull_high_n_s16 and friends. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196688 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196638:Bill Wendling2013-12-07
| | | | | | | | | | | ------------------------------------------------------------------------ r196638 | arsenm | 2013-12-06 18:58:45 -0800 (Fri, 06 Dec 2013) | 1 line Fix assert with copy from global through addrspacecast ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196668 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196391:Bill Wendling2013-12-07
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196391 | hliao | 2013-12-04 09:44:22 -0800 (Wed, 04 Dec 2013) | 5 lines [X86] Check YMM31/ZMM31 as well - No test case as there's no calling convention preserve YMM31/ZMM31 only ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196653 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196261:Bill Wendling2013-12-07
| | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196261 | hliao | 2013-12-03 01:17:32 -0800 (Tue, 03 Dec 2013) | 13 lines Enhance the fix of PR17631 - The fix to PR17631 fixes part of the cases where 'vzeroupper' should not be issued before 'call' insn. There're other cases where helper calls will be inserted not limited to epilog. These helper calls do not follow the standard calling convention and won't clobber any YMM registers. (So far, all call conventions will clobber any or part of YMM registers.) This patch enhances the previous fix to cover more cases 'vzerosupper' should not be inserted by checking if that function call won't clobber any YMM registers and skipping it if so. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196652 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196269:Bill Wendling2013-12-07
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196269 | jamesm | 2013-12-03 03:23:11 -0800 (Tue, 03 Dec 2013) | 5 lines Addrspacecasts are no-ops on ARM. Testcase added. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196651 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196611:Bill Wendling2013-12-06
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196611 | dexonsmith | 2013-12-06 13:48:36 -0800 (Fri, 06 Dec 2013) | 5 lines Don't use isNullValue to evaluate ConstantExpr ConstantExpr can evaluate to false even when isNullValue gives false. Fixes PR18143. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196614 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196508:Bill Wendling2013-12-06
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196508 | arnolds | 2013-12-05 07:14:40 -0800 (Thu, 05 Dec 2013) | 12 lines SLPVectorizer: An in-tree vectorized entry cannot also be a scalar external use We were creating external uses for scalar values in MustGather entries that also had a ScalarToTreeEntry (they also are present in a vectorized tuple). This meant we would keep a value 'alive' as a scalar and vectorized causing havoc. This is not necessary because when we create a MustGather vector we explicitly create external uses entries for the insertelement instructions of the MustGather vector elements. Fixes PR18129. radar://15582184 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196571 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r191049 and r191059. They were causing failures. See PR17975.Bill Wendling2013-12-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196521 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196267:Richard Sandiford2013-12-03
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196267 | rsandifo | 2013-12-03 11:01:54 +0000 (Tue, 03 Dec 2013) | 12 lines [SystemZ] Fix choice of known-zero mask in insertion optimization The backend converts 64-bit ORs into subreg moves if the upper 32 bits of one operand and the low 32 bits of the other are known to be zero. It then tries to peel away redundant ANDs from the upper 32 bits. Since AND masks are canonicalized to exclude known-zero bits, the test ORs the mask and the known-zero bits together before checking for redundancy. The problem was that it was using the wrong node when checking for known-zero bits, so could drop ANDs that were still needed. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196268 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196151:Bill Wendling2013-12-03
| | | | | | | | | | | | ------------------------------------------------------------------------ r196151 | mcrosier | 2013-12-02 13:05:16 -0800 (Mon, 02 Dec 2013) | 2 lines [AArch64] Implemented vcopy_lane patterns using scalar DUP instruction. Patch by Ana Pazos! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196230 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196104:Bill Wendling2013-12-02
| | | | | | | | | | | ------------------------------------------------------------------------ r196104 | rafael | 2013-12-02 06:59:34 -0800 (Mon, 02 Dec 2013) | 1 line Output .eh_frames on COFF too now that the integrated as is used on mingw. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196137 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196129:Bill Wendling2013-12-02
| | | | | | | | | | | ------------------------------------------------------------------------ r196129 | kkhoo | 2013-12-02 10:43:59 -0800 (Mon, 02 Dec 2013) | 1 line Conservative fix for PR17827 - don't optimize a shift + and + compare sequence where the shift is logical unless the comparison is unsigned ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196132 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196046:Bill Wendling2013-12-02
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196046 | tnorthover | 2013-12-01 06:16:24 -0800 (Sun, 01 Dec 2013) | 8 lines ARM: fix bug in -Oz stack adjustment folding Previously, we clobbered callee-saved registers when folding an "add sp, #N" into a "pop {rD, ...}" instruction. This change checks whether a register we're going to add to the "pop" could actually be live outside the function before doing so and should fix the issue. This should fix PR18081. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196074 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195401:Bill Wendling2013-12-02
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195401 | lhames | 2013-11-21 16:46:32 -0800 (Thu, 21 Nov 2013) | 8 lines Fix a typo where we were creating <def,kill> operands instead of <def,dead> ones. Add an assertion to make sure we catch this in the future. Fixes <rdar://problem/15464559>. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196073 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196044:Bill Wendling2013-12-02
| | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196044 | d0k | 2013-12-01 03:47:42 -0800 (Sun, 01 Dec 2013) | 6 lines Revamp error checking in the ms inline asm parser. - Actually abort when an error occurred. - Check that the frontend lookup worked when parsing length/size/type operators. Tested by a clang test. PR18096. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196070 91177308-0d34-0410-b5e6-96231b3b80d8
* Merged r195973:Daniel Sanders2013-12-01
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195973 | dsanders | 2013-11-30 13:47:57 +0000 (Sat, 30 Nov 2013) | 5 lines [mips][msa] MSA loads and stores have a 10-bit offset. Account for this when lowering FrameIndex. This prevents the compiler from emitting invalid ld.[bhwd]'s and st.[bhwd]'s when the stack frame is between 512 and 32,768 bytes in size. ------------------------------------------------------------------------ Review of this commit by Matheus Almeida revealed that it is still possible to emit invalid code (when the offset is not a multiple of the element size). However, we agreed that this commit still represents an improvement since it fixes many cases that previously emitted invalid code, and does not cause any cases that previously emitted valid code to emit invalid code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196049 91177308-0d34-0410-b5e6-96231b3b80d8
* Merged r195972:Daniel Sanders2013-12-01
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195972 | dsanders | 2013-11-30 13:15:21 +0000 (Sat, 30 Nov 2013) | 5 lines [mips][msa] A small refactor to reduce patch noise in my next commit No functional change. An if-statement has been split into two nested if-statements. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196047 91177308-0d34-0410-b5e6-96231b3b80d8
* Merged from r195975 and r195976.Daniel Sanders2013-12-01
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195975 | zjovanovic | 2013-11-30 19:12:28 +0000 (Sat, 30 Nov 2013) | 1 line Fixed issue with microMIPS long branch. ------------------------------------------------------------------------ r195976 | zjovanovic | 2013-11-30 19:13:15 +0000 (Sat, 30 Nov 2013) | 1 line Test case for issue with microMIPS long branch. ------------------------------------------------------------------------ To expand on those commit messages: The immediate in a MIPS branch is multiplied by the instruction size before use as an offset. For many MIPS ISA's this is 4 bytes, but for microMIPS it is 2 bytes. This commit corrects the scale factor used for microMIPS so that attempts to use large offsets result in a valid sequence of instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196043 91177308-0d34-0410-b5e6-96231b3b80d8
* --- Reverse-merging r195823 into '.':Bill Wendling2013-12-01
| | | | | | | | | | | | | | U lib/MC/MCSectionCOFF.cpp U lib/CodeGen/TargetLoweringObjectFileImpl.cpp U test/MC/COFF/weak-symbol.ll U test/MC/COFF/tricky-names.ll G . --- Recording mergeinfo for reverse merge of r195823 into '.': G . git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196036 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195941:Bill Wendling2013-12-01
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r195941 | haoliu | 2013-11-28 18:11:22 -0800 (Thu, 28 Nov 2013) | 4 lines AArch64: The pattern match should check the range of the immediate value. Or we can generate some illegal instructions. E.g. shrn2 v0.4s, v1.2d, #35. The legal range should be in [1, 16]. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196033 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195938:Bill Wendling2013-12-01
| | | | | | | | | | | | | ------------------------------------------------------------------------ r195938 | jiangning | 2013-11-28 17:37:15 -0800 (Thu, 28 Nov 2013) | 3 lines Add missing pattern for supporting intrinsic function vbsl_f64 with argument double floating point. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196030 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195936:Bill Wendling2013-12-01
| | | | | | | | | | | ------------------------------------------------------------------------ r195936 | kevinqin | 2013-11-28 17:29:16 -0800 (Thu, 28 Nov 2013) | 1 line [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196028 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195932:Bill Wendling2013-12-01
| | | | | | | | | | | | | ------------------------------------------------------------------------ r195932 | d0k | 2013-11-28 11:58:56 -0800 (Thu, 28 Nov 2013) | 3 lines Silence sign-compare warning and reduce nesting. No functionality change. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196027 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195905:Bill Wendling2013-12-01
| | | | | | | | | | | | | ------------------------------------------------------------------------ r195905 | jiangning | 2013-11-27 17:34:55 -0800 (Wed, 27 Nov 2013) | 3 lines Remove the variable only used by assert to avoid the build failure caused by build options [-Werror,-Wunused-variable]. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196026 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195903:Bill Wendling2013-12-01
| | | | | | | | | | | | ------------------------------------------------------------------------ r195903 | haoliu | 2013-11-27 17:07:45 -0800 (Wed, 27 Nov 2013) | 2 lines AArch64: Fix a bug about disassembling post-index load single element to 4 vectors ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196025 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196004:Bill Wendling2013-12-01
| | | | | | | | | | | | | ------------------------------------------------------------------------ r196004 | void | 2013-11-30 19:36:07 -0800 (Sat, 30 Nov 2013) | 3 lines Use 'unsigned char' to get this past gcc error message: error: invalid conversion from 'unsigned char' to '{anonymous}::Sequence' ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196005 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195590:Bill Wendling2013-12-01
| | | | | | | | | | | ------------------------------------------------------------------------ r195590 | chapuni | 2013-11-24 16:52:46 -0800 (Sun, 24 Nov 2013) | 1 line SparcFrameLowering.cpp: Prune 'DL' [-Wunused-variable] ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196003 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195677:Bill Wendling2013-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195677 | dpeixott | 2013-11-25 11:11:13 -0800 (Mon, 25 Nov 2013) | 41 lines ARM integrated assembler generates incorrect nop opcode This patch fixes a bug in the assembler that was causing bad code to be emitted. When switching modes in an assembly file (e.g. arm to thumb mode) we would always emit the opcode from the original mode. Consider this small example: $ cat align.s .code 16 foo: add r0, r0 .align 3 add r0, r0 $ llvm-mc -triple armv7-none-linux align.s -filetype=obj -o t.o $ llvm-objdump -triple thumbv7 -d t.o Disassembly of section .text: foo: 0: 00 44 add r0, r0 2: 00 f0 20 e3 blx #4195904 6: 00 00 movs r0, r0 8: 00 44 add r0, r0 This shows that we have actually emitted an arm nop (e320f000) instead of a thumb nop. Unfortunately, this encodes to a thumb branch which causes bad things to happen when compiling assembly code with align directives. The fix is to notify the ARMAsmBackend when we switch mode. The MCMachOStreamer was already doing this correctly. This patch makes the same change for the MCElfStreamer. There is still a bug in the way nops are emitted for alignment because the MCAlignment fragment does not store the correct mode. The ARMAsmBackend will emit nops for the last mode it knew about. In the example above, we still generate an arm nop if we add a `.code 32` to the end of the file. PR18019 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196001 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195881:Bill Wendling2013-12-01
| | | | | | | | | | | | | ------------------------------------------------------------------------ r195881 | tstellar | 2013-11-27 13:23:39 -0800 (Wed, 27 Nov 2013) | 3 lines R600: Expand vector FABS NOTE: This is a candidate for the 3.4 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196000 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195879:Bill Wendling2013-12-01
| | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195879 | tstellar | 2013-11-27 13:23:29 -0800 (Wed, 27 Nov 2013) | 6 lines R600/SI: Use SGPR_32 register class for 32-bit SMRD outputs Writing to the M0 register from an SMRD instruction hangs the GPU, so we need to use the SGPR_32 register class, which does not include M0. NOTE: This is a candidate for the 3.4 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195999 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195878:Bill Wendling2013-12-01
| | | | | | | | | | | | | ------------------------------------------------------------------------ r195878 | tstellar | 2013-11-27 13:23:20 -0800 (Wed, 27 Nov 2013) | 3 lines R600: Add support for ISD::FROUND NOTE: This is a candidate for the 3.4 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195998 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195843:Bill Wendling2013-12-01
| | | | | | | | | | | | ------------------------------------------------------------------------ r195843 | jiangning | 2013-11-27 06:02:25 -0800 (Wed, 27 Nov 2013) | 2 lines Fix the AArch64 NEON bug exposed by checking constant integer argument range of ACLE intrinsics. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195997 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195803:Bill Wendling2013-12-01
| | | | | | | | | | | ------------------------------------------------------------------------ r195803 | mcrosier | 2013-11-26 17:45:58 -0800 (Tue, 26 Nov 2013) | 1 line [AArch64] Add support for NEON scalar floating-point absolute difference. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195994 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195788:Bill Wendling2013-12-01
| | | | | | | | | | | | ------------------------------------------------------------------------ r195788 | mcrosier | 2013-11-26 14:17:37 -0800 (Tue, 26 Nov 2013) | 2 lines [AArch64] Add support for NEON scalar floating-point to integer convert instructions. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195993 91177308-0d34-0410-b5e6-96231b3b80d8
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