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* Remove dead code.Chad Rosier2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167970 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove DOS line endings.Jakub Staszak2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167968 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Enable SSE memory intrinsics even when stack alignment is less than 16 ↵Benjamin Kramer2012-11-14
| | | | | | | | | | | | | | | | | | bytes. The stack realignment code was fixed to work when there is stack realignment and a dynamic alloca is present so this shouldn't cause correctness issues anymore. Note that this also enables generation of AVX instructions for memset under the assumptions: - Unaligned loads/stores are always fast on CPUs supporting AVX - AVX is not slower than SSE We may need some tweaked heuristics if one of those assumptions turns out not to be true. Effectively reverts r58317. Part of PR2962. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167967 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace std::vector -> SmallVector in BBVectorizeHal Finkel2012-11-14
| | | | | | | | | For now, this uses 8 on-stack elements. I'll need to do some profiling to see if this is the best number. Pointed out by Jakob in post-commit review. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167966 91177308-0d34-0410-b5e6-96231b3b80d8
* The code pattern "imm0_255_neg" is used for checking if an immediate value ↵Nadav Rotem2012-11-14
| | | | | | | | | | | | | is a small negative number. This patch changes the definition of negative from -0..-255 to -1..-255. I am changing this because of a bug that we had in some of the patterns that assumed that "subs" of zero does not set the carry flag. rdar://12028498 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167963 91177308-0d34-0410-b5e6-96231b3b80d8
* [NVPTX] Implement custom lowering of loads/stores for i1Justin Holewinski2012-11-14
| | | | | | | | | Loads from i1 become loads from i8 followed by trunc Stores to i1 become zext to i8 followed by store to i8 Fixes PR13291 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167948 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix really stupid ARM EHABI info generation bug: we should not emitAnton Korobeynikov2012-11-14
| | | | | | | | eh table and handler data if there are no landing pads in the function. Patch by Logan Chien with some cleanups from me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167945 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the largest offender of determinism in BBVectorizeHal Finkel2012-11-14
| | | | | | | | | | | | | | | | | Iterating over the children of each node in the potential vectorization plan must happen in a deterministic order (because it affects which children are erased when two children conflict). There was no need for this data structure to be a map in the first place, so replacing it with a vector is a small change. I believe that this was the last remaining instance if iterating over the elements of a Dense* container where the iteration order could matter. There are some remaining iterations over std::*map containers where the order might matter, but so long as the Value* for instructions in a block increase with the order of the instructions in the block (or decrease) monotonically, then this will appear to be deterministic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167942 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.Jim Grosbach2012-11-14
| | | | | | | | | | When an instruction as written requires 32-bit mode and we're assembling in 64-bit mode, or vice-versa, issue a more specific diagnostic about what's wrong. rdar://12700702 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167937 91177308-0d34-0410-b5e6-96231b3b80d8
* s/assert/llvm_unreachable/Matt Beaumont-Gay2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167936 91177308-0d34-0410-b5e6-96231b3b80d8
* [TSan] fix indentationAlexey Samsonov2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167928 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit relocations from .debug_aranges to .debug_info for asm filesAlexey Samsonov2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167926 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert some redundant parts of r142605.Patrik Hägglund2012-11-14
| | | | | | | | | | This seems like redundant leftovers from r142288 - exposing TargetData::parseSpecifier to LLParser - which got reverted. Removes redunant td != NULL checks in parseSpecifier, and simplifies the interface to parseSpecifier and init. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167924 91177308-0d34-0410-b5e6-96231b3b80d8
* Set FFLOOR of vectors to expand to keep intruction selection from failing.Craig Topper2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167922 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor out an overly replicated typecast. No functional change.Craig Topper2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167916 91177308-0d34-0410-b5e6-96231b3b80d8
* Set FFLOOR for vectors to expand on CellSPU to keep instruction selection ↵Craig Topper2012-11-14
| | | | | | from failing on llvm.floor of a vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167914 91177308-0d34-0410-b5e6-96231b3b80d8
* Add newlines to end of debug messages.Craig Topper2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167913 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.Rafael Espindola2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167912 91177308-0d34-0410-b5e6-96231b3b80d8
* Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov2012-11-14
| | | | | | | | | Do some cleanup of the code while here. Inspired by patch by Logan Chien! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167904 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken asserts. Also, spell 'indices' correctly.Matt Beaumont-Gay2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167894 91177308-0d34-0410-b5e6-96231b3b80d8
* [Object] Fix endianess bug by refactoring Archive::Symbol::getMember.Michael J. Spencer2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167893 91177308-0d34-0410-b5e6-96231b3b80d8
* use the getSplat API. Patch by Paul Redmond.Nadav Rotem2012-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167892 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Use the 'count' attribute instead of the 'upper_bound' attribute."Eric Christopher2012-11-13
| | | | | | | | temporarily as it is breaking the gdb bots. This reverts commit r167806/e7ff4c14b157746b3e0228d2dce9f70712d1c126. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167886 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert -join-splitedges to a boolean cmd line option.Andrew Trick2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167880 91177308-0d34-0410-b5e6-96231b3b80d8
* The MachineScheduler does not currently require JoinSplitEdges.Andrew Trick2012-11-13
| | | | | | | This option will eventually either be enabled unconditionally or replaced by a more general live range splitting optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167879 91177308-0d34-0410-b5e6-96231b3b80d8
* [MC][COFF] Emit weak symbols to the correct section. Patch by Dmitry Puzirev!Michael J. Spencer2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167877 91177308-0d34-0410-b5e6-96231b3b80d8
* Add (some) PowerPC TLS relocation types to ELF.h andUlrich Weigand2012-11-13
| | | | | | | | generate them from PPCELFObjectWriter::getRelocTypeInner as appropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167864 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix wrong PowerPC instruction opcodes for:Ulrich Weigand2012-11-13
| | | | | | | | | - lwaux - lhzux - stbu git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167863 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix wrong PowerPC instruction encodings due toUlrich Weigand2012-11-13
| | | | | | | | | | operand field name mismatches in: - AForm_3 (fmul, fmuls) - XFXForm_5 (mtcrf) - XFLForm (mtfsf) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167862 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix instruction encoding for "bd(n)z" on PowerPC,Ulrich Weigand2012-11-13
| | | | | | | by using a new instruction format BForm_1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167861 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix instruction encoding for "isel" on PowerPC,Ulrich Weigand2012-11-13
| | | | | | | using a new instruction format AForm_4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167860 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: when constructing VZEXT_LOAD from other loads, makes sure its outputManman Ren2012-11-13
| | | | | | | | | | | | chain is correctly setup. As an example, if the original load must happen before later stores, we need to make sure the constructed VZEXT_LOAD is constrained to be before the stores. rdar://12684358 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167859 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not consider a machine instruction that uses and defines the sameUlrich Weigand2012-11-13
| | | | | | | | | | | physical register as candidate for common subexpression elimination in MachineCSE. This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc caused by MachineCSE invalidly merging two separate DYNALLOC insns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167855 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding changes to support GNU style archive library readingShankar Easwaran2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167853 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix -join-splitedges: my previous "cleanup" broke it.Andrew Trick2012-11-13
| | | | | | | Working on reducing unit tests. This won't be enabled unless a subtarget enables misched. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167851 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 167755/167760. We don't want to emit crash diagnostics on ↵Chad Rosier2012-11-13
| | | | | | command-line syntax errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167849 91177308-0d34-0410-b5e6-96231b3b80d8
* Codegen support for arbitrary vector getelementptrs.Duncan Sands2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167830 91177308-0d34-0410-b5e6-96231b3b80d8
* Relax the restrictions on vector of pointer types, and vector getelementptr.Duncan Sands2012-11-13
| | | | | | | | | | | | | | | | Previously in a vector of pointers, the pointer couldn't be any pointer type, it had to be a pointer to an integer or floating point type. This is a hassle for dragonegg because the GCC vectorizer happily produces vectors of pointers where the pointer is a pointer to a struct or whatever. Vector getelementptr was restricted to just one index, but now that vectors of pointers can have any pointer type it is more natural to allow arbitrary vector getelementptrs. There is however the issue of struct GEPs, where if each lane chose different struct fields then from that point on each lane will be working down into unrelated types. This seems like too much pain for too little gain, so when you have a vector struct index all the elements are required to be the same. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167828 91177308-0d34-0410-b5e6-96231b3b80d8
* DependenceAnalysis: Print all dependency pairs when dumping. Update all ↵Benjamin Kramer2012-11-13
| | | | | | | | testcases. Part of a patch by Preston Briggs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167827 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Allow subtargets to enable misched and dependent options.Andrew Trick2012-11-13
| | | | | | | | | | | | This allows me to begin enabling (or backing out) misched by default for one subtarget at a time. To run misched we typically want to: - Disable SelectionDAG scheduling (use the source order scheduler) - Enable more aggressive coalescing (until we decide to always run the coalescer this way) - Enable MachineScheduler pass itself. Disabling PostRA sched may follow for some subtargets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167826 91177308-0d34-0410-b5e6-96231b3b80d8
* Added RegisterCoalescer support for joining global copies first.Andrew Trick2012-11-13
| | | | | | | | | | | | This adds the -join-globalcopies option which can be enabled by default once misched is also enabled. Ideally, the register coalescer would be able to split local live ranges in a way that produces copies that can be easily resolved by the scheduler. Until then, this heuristic should be good enough to at least allow the scheduler to run after coalescing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167825 91177308-0d34-0410-b5e6-96231b3b80d8
* Figure out <size> argument of llvm.lifetime intrinsics at the moment they ↵Alexey Samsonov2012-11-13
| | | | | | are created (during function inlining) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167821 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commit.Jyotsna Verma2012-11-13
| | | | | | | Add a blank line. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167819 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Remove temporary assert used for debuggingHal Finkel2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167817 91177308-0d34-0410-b5e6-96231b3b80d8
* instcombine: Migrate math library call simplificationsMeador Inge2012-11-13
| | | | | | | | | | | | | | | | | This patch migrates the math library call simplifications from the simplify-libcalls pass into the instcombine library call simplifier. I have typically migrated just one simplifier at a time, but the math simplifiers are interdependent because: 1. CosOpt, PowOpt, and Exp2Opt all depend on UnaryDoubleFPOpt. 2. CosOpt, PowOpt, Exp2Opt, and UnaryDoubleFPOpt all depend on the option -enable-double-float-shrink. These two factors made migrating each of these simplifiers individually more of a pain than it would be worth. So, I migrated them all together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167815 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Don't vectorize vector-manipulation chainsHal Finkel2012-11-13
| | | | | | | | Don't choose a vectorization plan containing only shuffles and vector inserts/extracts. Due to inperfections in the cost model, these can lead to infinite recusion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167811 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r167759. Ben is right this isn't likely to help much.Evan Cheng2012-11-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167809 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Don't consider artificial edges weak edges.Andrew Trick2012-11-13
| | | | | | | For now be more conservative in case other out-of-tree schedulers rely on the old behavior of artificial edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167808 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the 'count' attribute instead of the 'upper_bound' attribute.Bill Wendling2012-11-13
| | | | | | | | | | If we have a type 'int a[1]' and a type 'int b[0]', the generated DWARF is the same for both of them because we use the 'upper_bound' attribute. Instead use the 'count' attrbute, which gives the correct number of elements in the array. <rdar://problem/12566646> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167806 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-13
| | | | | | Block priorities still apply outside loops. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167793 91177308-0d34-0410-b5e6-96231b3b80d8
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