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* Hexagon constant extender support.Brendon Cahoon2012-05-11
* Typo.Chad Rosier2012-05-11
* [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Min...Chad Rosier2012-05-11
* Hexagon V5 intrinsics support.Sirish Pande2012-05-11
* [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-regChad Rosier2012-05-11
* objectsize: add a few more tests and fix a bugNuno Lopes2012-05-11
* [fast-isel] Rather then assert (or segfault in a non-asserts build), fall backChad Rosier2012-05-11
* The return type is an unsigned, not a bool.Chad Rosier2012-05-11
* Add space before an open parenthesis in control flow statements.Manman Ren2012-05-11
* Added X86 Atom latencies to X86InstrMMX.td.Preston Gurd2012-05-11
* Implement initial-exec TLS model for 32-bit PIC x86Hans Wennborg2012-05-11
* Added the missing bit definition for the 4th bit of the STR (post reg) instru...Silviu Baranga2012-05-11
* Fixed the LLVM ARM v7 assembler and instruction printer for 8-bit immediate o...Silviu Baranga2012-05-11
* Fix a misleading comment.Akira Hatanaka2012-05-11
* Tidy up. Trailing whitespace.Jim Grosbach2012-05-11
* Fix a minor logic mistake transforming compares in instcombine. PR12514.Eli Friedman2012-05-11
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-11
* Define a new intrinsic, @llvm.debugger. It will be similar to __builtin_trap(),Dan Gohman2012-05-11
* Allow unique_file to take a mode for file permissions, but defaultEric Christopher2012-05-11
* Fix intendation.Chad Rosier2012-05-10
* objectsize: add support for GEPs with non-constant indexesNuno Lopes2012-05-10
* Added X86 Atom latencies for instructions in X86InstrInfo.td.Preston Gurd2012-05-10
* Add support for the 'X' inline asm operand modifier.Eric Christopher2012-05-10
* misched: Print machineinstrs with -debug-only=mischedAndrew Trick2012-05-10
* misched: tracing register pressure heuristics.Andrew Trick2012-05-10
* misched: Add register pressure backoff to ConvergingScheduler.Andrew Trick2012-05-10
* misched: Release only unscheduled nodes into ReadyQ.Andrew Trick2012-05-10
* misched: Added ReadyQ container wrapper for Top and Bottom Queues.Andrew Trick2012-05-10
* misched: Introducing Top and Bottom register pressure trackers during schedul...Andrew Trick2012-05-10
* Hexagon V5 Support - V5 td file.Sirish Pande2012-05-10
* Hexagon V5 FP Support.Sirish Pande2012-05-10
* RegPressure: API for speculatively checking instruction pressure.Andrew Trick2012-05-10
* RegPressure: fix array index iteration style.Andrew Trick2012-05-10
* Teach DeadStoreElimination to eliminate exit-block stores with phi addresses.Dan Gohman2012-05-10
* Revert: 156550 "ARM: peephole optimization to remove cmp instruction"Manman Ren2012-05-10
* Rewrite ScalarEvolution::hasOperand to use an explicit worklist insteadDan Gohman2012-05-10
* teach DSE and isInstructionTriviallyDead() about callocNuno Lopes2012-05-10
* ARM: peephole optimization to remove cmp instructionManman Ren2012-05-10
* Fix a problem with incomplete equality testing of PHINodes in Joel Jones2012-05-10
* Fix merge-typo and cleanupNadav Rotem2012-05-10
* AVX2: Add an additional broadcast idiom.Nadav Rotem2012-05-10
* Generate AVX/AVX2 shuffles even when there is a memory op somewhere else in t...Nadav Rotem2012-05-10
* ExecutionEngine: Check for NULL ErrorStr before using it.Jim Grosbach2012-05-10
* Fix the objc_storeStrong recognizer to stop before walking off theDan Gohman2012-05-09
* objectsize:Nuno Lopes2012-05-09
* Mark .opd @progbits, thus avoiding a warning from asm.Roman Divacky2012-05-09
* Set the default iOS version to 3.0.Chad Rosier2012-05-09
* Use the cpuid 64 bit flag to pick the default CPU name for an unknown model.Bob Wilson2012-05-09
* Don't return true on a function with a void return type.Chad Rosier2012-05-09
* Add Triple::getiOSVersion.Chad Rosier2012-05-09