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* [LCG] Remove the Module reference member which we weren't using forChandler Carruth2014-04-17
| | | | | | anything and doesn't make sense if assigning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206449 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Add disassembler support for the 0x0f 0x7f form of movq %mm, %mm.Craig Topper2014-04-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206447 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: rework static_assert to be MSVC compatibleSaleem Abdulrasool2014-04-17
| | | | | | | | Visual Studio does not permit referencing a structure member as a static field for sizeof calculations. Resort to a pointer cast which is compatible across Visual Studio and other compilers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206445 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Fix zext from i1 to i64Matt Arsenault2014-04-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206437 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64] Fix "Cannot select" for vector ctpopAdam Nemet2014-04-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit of r205855: Author: Arnold Schwaighofer <aschwaighofer@apple.com> Date: Wed Apr 9 14:20:47 2014 +0000 SLPVectorizer: Only vectorize intrinsics whose operands are widened equally The vectorizer only knows how to vectorize intrinics by widening all operands by the same factor. Patch by Tyler Nowicki! exposed a backend bug causing a regression (Cannot select ctpop). The commit msg is a bit confusing because the patch actually changes the behavior for the loop-vectorizer as well. As things got refactored into a helper ctpop got snuck in to the trivially-vectorizable helper which is now used by both vectorizers. In other words, we started seeing vector-ctpops in the backend. This change makes ctpop LegalizeAction::Expand for the types not supported by the byte-only CNT instruction. We may be able to custom-lower these later to a single CNT but this is to fix the compiler crash first. Fixes <rdar://problem/16578951> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206433 91177308-0d34-0410-b5e6-96231b3b80d8
* Inline a function when the always_inline attributeGerolf Hoflehner2014-04-17
| | | | | | | | | | | | | is set even when it contains a indirect branch. The attribute overrules correctness concerns like the escape of a local block address. This is for rdar://16501761 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206429 91177308-0d34-0410-b5e6-96231b3b80d8
* [c++11] Tidy up AsmPrinter.cpp.Jim Grosbach2014-04-16
| | | | | | | Range'ify loops and tidy up some by-reference handling. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206422 91177308-0d34-0410-b5e6-96231b3b80d8
* Added new functionality to LLVM C API to use DiagnosticInfo to handle errorsTom Stellard2014-04-16
| | | | | | Patch by: Darren Powell git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206407 91177308-0d34-0410-b5e6-96231b3b80d8
* Replacing a non-ASCII character in a comment with an ASCII character. Fixes ↵Aaron Ballman2014-04-16
| | | | | | a C4819 warning in MSVC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206403 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow diagnostic handlers to check for optimization remarks.Diego Novillo2014-04-16
| | | | | | | | | | | | | | | | | | Summary: When optimization remarks are enabled via the driver flag -Rpass, we should allow the FE diagnostic handler to check if the given pass name needs a diagnostic. We were unconditionally checking the pattern defined in opt's -pass-remarks flag. This was causing the FE to not emit any diagnostics. Reviewers: qcolombet CC: llvm-commits Differential Revision: http://reviews.llvm.org/D3362 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206400 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Use TwoOperandAliasConstraint for shift instructions.Matheus Almeida2014-04-16
| | | | | | | | | | | This enables TableGen to generate an additional two operand matcher for our shift_rotate_imm and shift_rotate_reg class of instructions. The tests were also updated so that they include now encoding information for all affected instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206398 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add initial support for NaN2008 in the back-end.Matheus Almeida2014-04-16
| | | | | | | | | | | | | This is so that EF_MIPS_NAN2008 is set if we are using IEEE 754-2008 NaN encoding (-mnan=2008). This patch also adds support for parsing '.nan legacy' and '.nan 2008' assembly directives. The handling of these directives should match GAS' behaviour i.e., the last directive in use sets the ELF header bit (EF_MIPS_NAN2008). Differential Revision: http://reviews.llvm.org/D3346 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206396 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: silence sign-comparison warning.Tim Northover2014-04-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206393 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: produce correct relocation for conditional branches.Tim Northover2014-04-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206391 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] IndentationDaniel Sanders2014-04-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206389 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Fix emission of '.option pic0' for MIPS-IV.Daniel Sanders2014-04-16
| | | | | | | | | | | | Summary: This was a case of incorrect usage of hasMips64() vs isABI_N64() Reviewers: matheusalmeida, dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3398 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206388 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Correct r206370 to account for non-Linux targets using the small data ↵Daniel Sanders2014-04-16
| | | | | | | | | | | | | | section. This should fix the ninja-x64-msvc-RA-centos6 builder. I suspect the check in MipsSubtarget.cpp is incorrect and is really trying to check for a bare-metal target rather and anything other than linux. I'll investigate this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206385 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] add two new hidden compile-time flags for asan: ↵Kostya Serebryany2014-04-16
| | | | | | asan-instrumentation-with-call-threshold and asan-memory-access-callback-prefix. This is part of the workaround for PR17409 (instrument huge functions with callbacks instead of inlined code). These flags will also help us experiment with kasan (kernel-asan) and clang git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206383 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64/ARM64: port across stub handling for ELF C++ exceptions.Tim Northover2014-04-16
| | | | | | | | The most important part here is that we should actuall emit the stubs we refer to in the exception table, but as a side issue this uses more sensible & GCC compatible representations for some of the bits of information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206380 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: use 32-bit moves for constants where possible.Tim Northover2014-04-16
| | | | | | | | | | | | If we know that a particular 64-bit constant has all high bits zero, then we can rely on the fact that 32-bit ARM64 instructions automatically zero out the high bits of an x-register. This gives the expansion logic less constraints to satisfy and so sometimes allows it to pick better sequences. Came up while porting test/CodeGen/AArch64/movw-consts.ll: this will allow a 32-bit MOVN to be used in @test8 soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206379 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: use the integrated assembler on ELF.Tim Northover2014-04-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206378 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Emit '.set nomicromips' before a function's entry labelMatheus Almeida2014-04-16
| | | | | | | | | | | | | if not in micromips mode. The test (elf_st_other.ll) was renamed as the name and description didn't make sense as the test wasn't checking any symbol table entry. Differential Revision: http://reviews.llvm.org/D3346 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206377 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixing a compile error in debug versions of MSVC. It seems that the ↵Aaron Ballman2014-04-16
| | | | | | range-based for loop is confused by the DEBUG macro expansion unless a compound statement is used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206376 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Correct callee saved list for the N32 ABI and enable testDaniel Sanders2014-04-16
| | | | | | | | | | | | Summary: Depends on D3339 Reviewers: matheusalmeida, vmedic Reviewed By: matheusalmeida Differential Revision: http://reviews.llvm.org/D3340 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206371 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: mark x7 as used when an i128 gets shunted onto the stack.Tim Northover2014-04-16
| | | | | | | | The second half of a split i128 was ending up in x7, which is not a good thing. This is another part of PR19432. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206366 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombiner: don't optimise non-existant litpool loadTim Northover2014-04-16
| | | | | | | | | | | This particular DAG combine is designed to kick in when both ConstantFPs will end up being loaded via a litpool, however those nodes have a semi-legal status, dictated by isFPImmLegal so in some cases there wouldn't have been a litpool in the first place. Don't try to be clever in those circumstances. Picked up while merging some AArch64 tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206365 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify a static_assert so VS2013 can build itTimur Iskhodzhanov2014-04-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206363 91177308-0d34-0410-b5e6-96231b3b80d8
* COFF: fix an off by one errorSaleem Abdulrasool2014-04-16
| | | | | | | | | | Adjust the tests to validate the number of auxiliary entries used to store the filename. Thanks to majnemer's sharp eye for catching the missing - 1 in the round up calculation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206359 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert SelectionDAG::getVTList to use ArrayRefCraig Topper2014-04-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206357 91177308-0d34-0410-b5e6-96231b3b80d8
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper2014-04-16
| | | | | | instead of comparing to nullptr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206356 91177308-0d34-0410-b5e6-96231b3b80d8
* COFF: add support for .file symbolsSaleem Abdulrasool2014-04-16
| | | | | | | | | | | | | Add support for emitting .file records. This is mostly a quality of implementation change (more complete support for COFF file emission) that was noticed while working on COFF file emission for Windows on ARM. A .file record is emitted as a symbol with storage class FILE (103) and the name ".file". A series of auxiliary format 4 records follow which contain the file name. The filename is stored as an ANSI string and is padded with NULL if the length is not a multiple of COFF::SymbolSize (18). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206355 91177308-0d34-0410-b5e6-96231b3b80d8
* Target: whitespaceSaleem Abdulrasool2014-04-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206353 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand sign extension of vectors.Matt Arsenault2014-04-16
| | | | | | | | | | | | | | Setting vector types to expand will result in scalarization on pre SI hw, as those gpus don't have vector shifts either. Expand also i32 vectors, this helps llvm make the correct decision about scalarizing the vector ops. v2: move setOperation() calls to R600ISelLowering.cpp. cleanup the SI code to make it obvious that this patch does is nop for SI Patch by: Jan Vesely <jan.vesely@rutgers.edu> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206348 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64,C++11] Tidy up branch relaxation a bit w/ c++11.Jim Grosbach2014-04-16
| | | | | | No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206344 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM64: Nuke some dead code.Jim Grosbach2014-04-16
| | | | | | Missed in previous commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206343 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64,C++11] Clean up the ARM64 LOH collection pass.Jim Grosbach2014-04-15
| | | | | | | | Range'ify a bunch of loops, mainly. As a result, we have a variety of objects via reference rather than by pointer, so propogate that through the various helper functions where it makes sense. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206337 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Print code size along with used registersMatt Arsenault2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206336 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Print more immediates in hex formatMatt Arsenault2014-04-15
| | | | | | | | | Print in decimal for inline immediates, and hex otherwise. Use hex always for offsets in addressing offsets. This approximately matches what the shader compiler does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206335 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Cleanup parsing of register names.Matt Arsenault2014-04-15
| | | | | | Try to figure out the class and number of subregisters. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206334 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Fix loads of i1Matt Arsenault2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206330 91177308-0d34-0410-b5e6-96231b3b80d8
* RegionInfo: Do not access a value that was just moved awayTobias Grosser2014-04-15
| | | | | | This fixes a regression introduced in r206310. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206328 91177308-0d34-0410-b5e6-96231b3b80d8
* Make FastISel::SelectInstruction return before target specific fast-isel codeAkira Hatanaka2014-04-15
| | | | | | | | | | | | | handles Intrinsic::trap if TargetOptions::TrapFuncName is set. This fixes a bug in which the trap function was not taken into consideration when a program was compiled without optimization (at -O0). <rdar://problem/16291933> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206323 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Improve the lowering of packed shifts by constant build_vector.Andrea Di Biagio2014-04-15
| | | | | | | | | | | | | | | | | | | | | | | | | This patch teaches the backend how to efficiently lower logical and arithmetic packed shifts on both SSE and AVX/AVX2 machines. When possible, instead of scalarizing a vector shift, the backend should try to expand the shift into a sequence of two packed shifts by immedate count followed by a MOVSS/MOVSD. Example (v4i32 (srl A, (build_vector < X, Y, Y, Y>))) Can be rewritten as: (v4i32 (MOVSS (srl A, <Y,Y,Y,Y>), (srl A, <X,X,X,X>))) [with X and Y ConstantInt] The advantage is that the two new shifts from the example would be lowered into X86ISD::VSRLI nodes. This is always cheaper than scalarizing the vector into four scalar shifts plus four pairs of vector insert/extract. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206316 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM64] Set default CPU to generic instead of cyclone.Quentin Colombet2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206313 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r191049/r191059 as it can produce wrong code (see PR17975).Robert Lougher2014-04-15
| | | | | | | It has already been reverted on the 3.4 branch in r196521. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206311 91177308-0d34-0410-b5e6-96231b3b80d8
* Use unique_ptr to manage ownership of child Regions within llvm::RegionDavid Blaikie2014-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206310 91177308-0d34-0410-b5e6-96231b3b80d8
* Add lifetime markers for allocas created to hold byval arguments, make themJulien Lerouge2014-04-15
| | | | | | | appear in the InlineFunctionInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206308 91177308-0d34-0410-b5e6-96231b3b80d8
* Split byval argument initialization so the memcpy(s) are injected at theJulien Lerouge2014-04-15
| | | | | | | beginning of the first new block after inlining. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206307 91177308-0d34-0410-b5e6-96231b3b80d8
* LTO: Add more loop simplification passes to LTODuncan P. N. Exon Smith2014-04-15
| | | | | | | | | Similar to r202051, add missing loop simplification passes to the LTO optimization pipeline. Patch by Rafael Espindola. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206306 91177308-0d34-0410-b5e6-96231b3b80d8
* verify-di: Add back braces for MSVC compatabilityDuncan P. N. Exon Smith2014-04-15
| | | | | | | | Fixup after r206300. <rdar://problem/15500563> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206305 91177308-0d34-0410-b5e6-96231b3b80d8
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