summaryrefslogtreecommitdiff
path: root/lib
Commit message (Collapse)AuthorAge
...
* Left out the NDEBUG in the previous checkin.Andrew Trick2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211867 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineScheduler: add some book-keeping to fix an assert.Andrew Trick2014-06-27
| | | | | | | | Fixe for Bug 20057 - Assertion failied in llvm::SUnit* llvm::SchedBoundary::pickOnlyChoice(): Assertion `i <= (HazardRec->getMaxLookAhead() + MaxObservedStall) && "permanent hazard"' Thanks to Chad for the test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211865 91177308-0d34-0410-b5e6-96231b3b80d8
* Propagate const-correctness into parseBitcodeFile()Alp Toker2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211864 91177308-0d34-0410-b5e6-96231b3b80d8
* Have MipsSelectionDAGInfo constructor take a DataLayout ratherEric Christopher2014-06-27
| | | | | | | than a target machine since it doesn't need anything past the DataLayout. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211863 91177308-0d34-0410-b5e6-96231b3b80d8
* ParseIR: don't take ownership of the MemoryBufferAlp Toker2014-06-27
| | | | | | | | | | clang was needlessly duplicating whole memory buffer contents in an attempt to satisfy unclear ownership semantics. Let's just hide internal LLVM quirks and present a simple non-owning interface. The public C API preserves previous behaviour for stability. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211861 91177308-0d34-0410-b5e6-96231b3b80d8
* Move NVPTX subtarget dependent variables from the target machineEric Christopher2014-06-27
| | | | | | to the subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211860 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the target lowering we can get off of the DAG rather than offEric Christopher2014-06-27
| | | | | | of the cached target machine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211858 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix missing newline and simplify debug printing.Matt Arsenault2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211850 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Move load/store ReplaceNodeResults to common code.Matt Arsenault2014-06-27
| | | | | | Future patches will want to custom lower loads on SI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211848 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the constructor for NVPTXFrameLowering into the implementationEric Christopher2014-06-27
| | | | | | file in preparation for the subtarget move. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211847 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary caching of the TargetMachine on NVPTXFrameLowering.Eric Christopher2014-06-27
| | | | | | Adjust the constructor accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211846 91177308-0d34-0410-b5e6-96231b3b80d8
* Rework the logic for setting the TargetName. This appears toEric Christopher2014-06-27
| | | | | | be shorter and identical in goal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211845 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove caching of the target machine in NVPTXInstrInfo andEric Christopher2014-06-27
| | | | | | update constructor accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211840 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove comment that duplicated information in the constructorEric Christopher2014-06-27
| | | | | | that it's after. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211839 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove commented out code.Eric Christopher2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211838 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove extraneous parens and extraneous const cast (and fix theEric Christopher2014-06-27
| | | | | | prototype for the function to patch what we were returning). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211837 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the subtarget dependent features from the target machine toEric Christopher2014-06-27
| | | | | | the subtarget for the MSP430 target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211836 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove uses and caches of the target machine and subtarget fromEric Christopher2014-06-27
| | | | | | | | both MSP430InstrInfo and MSP430RegisterInfo. Remove unused member variable StackAlign from MSP430RegisterInfo. Update constructors accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211835 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove caching of an unused subtarget from MSP430FrameLowering.Eric Christopher2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211830 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] AVX512: Add vbroadcasti*Adam Nemet2014-06-27
| | | | | | | | | For now I used a separate template for these sub-vector/tuple broadcasts rather than sharing the mem variants with avx512_int_broadcast_rm. <rdar://problem/17402869> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211828 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary caching of variables by MSP430TargetLowering andEric Christopher2014-06-27
| | | | | | | make the constructor more general since it only needs a target machine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211827 91177308-0d34-0410-b5e6-96231b3b80d8
* Have MSP430SelectionDAGInfo constructor take a DataLayout ratherEric Christopher2014-06-27
| | | | | | | than a target machine since it doesn't need anything past the DataLayout. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211826 91177308-0d34-0410-b5e6-96231b3b80d8
* Move all of the hexagon subtarget dependent variables from the targetEric Christopher2014-06-27
| | | | | | machine to the subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211824 91177308-0d34-0410-b5e6-96231b3b80d8
* Have HexagonSelectionDAGInfo take a DataLayout rather than aEric Christopher2014-06-27
| | | | | | target machine since that's all it needs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211822 91177308-0d34-0410-b5e6-96231b3b80d8
* Make HexagonISelLowering not dependent upon a HexagonTargetMachine,Eric Christopher2014-06-27
| | | | | | but a normal TargetMachine and remove a few cached uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211821 91177308-0d34-0410-b5e6-96231b3b80d8
* Reduce indentation.Eric Christopher2014-06-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211820 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary caching of the subtarget for HexagonFrameLowering and ↵Eric Christopher2014-06-27
| | | | | | remove the unused constructor argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211819 91177308-0d34-0410-b5e6-96231b3b80d8
* InstrItineraryData is already on the subtarget, no reason toEric Christopher2014-06-27
| | | | | | cache it on the target as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211818 91177308-0d34-0410-b5e6-96231b3b80d8
* [StackMaps] Enable patchpoint liveness analysis per default.Juergen Ributzka2014-06-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211817 91177308-0d34-0410-b5e6-96231b3b80d8
* [Stackmaps] Remove the liveness calculation for stackmap intrinsics.Juergen Ributzka2014-06-26
| | | | | | | | | | There is no need to calculate the liveness information for stackmaps. The liveness information is still available for the patchpoint intrinsic and that is also the intended usage model. Related to <rdar://problem/17473725> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211816 91177308-0d34-0410-b5e6-96231b3b80d8
* [RuntimeDyld] Teach MachOObjectImage to deregister itself with the debugger uponLang Hames2014-06-26
| | | | | | | | destruction the same way ELFObjectImage does. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211815 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Introduce a string_ostream string builder facilty"Alp Toker2014-06-26
| | | | | | Temporarily back out commits r211749, r211752 and r211754. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211814 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the various Subtarget dependent members down to the subtargetEric Christopher2014-06-26
| | | | | | | | for the Sparc port. Use the same initializeSubtargetDependencies function to handle initialization similar to the other ports to handle dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211811 91177308-0d34-0410-b5e6-96231b3b80d8
* Have SparcSelectionDAGInfo take a DataLayout to initialize sinceEric Christopher2014-06-26
| | | | | | that's all it needs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211810 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the storage and use of the subtarget out of the sparc frameEric Christopher2014-06-26
| | | | | | lowering code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211809 91177308-0d34-0410-b5e6-96231b3b80d8
* GVN: Preserve invariant.load metadataArnold Schwaighofer2014-06-26
| | | | | | | | | | | If both instructions to be replaced are marked invariant the resulting instruction is invariant. rdar://13358910 Fix by Erik Eckstein! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211801 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove extraneous includes from the target machines.Eric Christopher2014-06-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211800 91177308-0d34-0410-b5e6-96231b3b80d8
* Move all of the ARM subtarget features down onto the subtargetEric Christopher2014-06-26
| | | | | | rather than the target machine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211799 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the frame lowering constructors out of line to avoid circularEric Christopher2014-06-26
| | | | | | includes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211798 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add FP mode bits to binary.Matt Arsenault2014-06-26
| | | | | | | | The default rounding mode to initialize the mode register needs to be reported to the runtime. Fill in other bits a kernel may be interested in setting for future use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211791 91177308-0d34-0410-b5e6-96231b3b80d8
* Silencing a warning about isZExtFree hiding an inherited virtual function. ↵Aaron Ballman2014-06-26
| | | | | | No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211783 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence a warning due to a comparison between signed and unsigned.Andrea Di Biagio2014-06-26
| | | | | | | | No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211782 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for ppc64/power8 as a hostWill Schmidt2014-06-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211781 91177308-0d34-0410-b5e6-96231b3b80d8
* add ppc64/pwr8 as targetWill Schmidt2014-06-26
| | | | | | | | | includes handling DIR_PWR8 where appropriate The P7Model Itinerary is currently tied in for use under the P8Model, and will be updated later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211779 91177308-0d34-0410-b5e6-96231b3b80d8
* Added parsing co-processor names starting with "cr"Renato Golin2014-06-26
| | | | | | | | | | Additional compliant GAS names for coprocessor register name are enabled for all instruction with parameter MCK_CoprocReg: LDC,LDC2,STC,STC2,CDP,CDP2,MCR,MCR2,MCRR,MCRR2,MRC,MRC2,MRRC,MRRC2 Patch by Andrey Kuharev. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211776 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Improve the selection of SSE3/AVX addsub instructions. Andrea Di Biagio2014-06-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch teaches the backend how to canonicalize a shuffle vectors according to the rule: - (shuffle (FADD A, B), (FSUB A, B), Mask) -> (shuffle (FSUB A, -B), (FADD A, -B), Mask) Where 'Mask' is: <0,5,2,7> ;; for v4f32 and v4f64 shuffles. <0,3> ;; for v2f64 shuffles. <0,9,2,11,4,13,6,15> ;; for v8f32 shuffles. In general, ISel only knows how to pattern-match a canonical 'fadd + fsub + blendi' dag node sequence into an ADDSUB instruction. This new rule allows to convert a non-canonical dag sequence into a canonical one that will be matched by a single ADDSUB at ISel stage. The idea of converting a non-canonical ADDSUB into a canonical one by swapping the first two operands of the shuffle, and then negating the second operand of the FADD and FSUB, was originally proposed by Hal Finkel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211771 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch removed duplicate code for matching patterns Dinesh Dwivedi2014-06-26
| | | | | | | | | | | which are now handled in SimplifyUsingDistributiveLaws() (after r211261) Differential Revision: http://reviews.llvm.org/D4253 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211768 91177308-0d34-0410-b5e6-96231b3b80d8
* Added instruction combine to transform few more negative values addition to ↵Dinesh Dwivedi2014-06-26
| | | | | | | | | | | | | | subtraction (Part 2) This patch enables transforms for (x + (~(y | c) + 1) --> x - (y | c) if c is even Differential Revision: http://reviews.llvm.org/D4209 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211765 91177308-0d34-0410-b5e6-96231b3b80d8
* GlobalOpt: Don't optimize thread_local for initializersDavid Majnemer2014-06-26
| | | | | | | | Folding a reference to a thread_local variable into another global variable's initializer is very problematic, there is no relocation that exists to represent such an access. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211762 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix vector FMAMatt Arsenault2014-06-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211757 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-15 10:12:56 +0000