| Commit message (Collapse) | Author | Age |
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Outputs branch information for unconditional branches in addition to
conditional branches. -b option must be enabled.
Also updated tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197432 91177308-0d34-0410-b5e6-96231b3b80d8
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aligned arguments.
This allows the WebKit_JS calling convention to perform partial writes on a 4
byte granularity to stack slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197431 91177308-0d34-0410-b5e6-96231b3b80d8
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SI_KIL -> SI_KILL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197425 91177308-0d34-0410-b5e6-96231b3b80d8
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that it coalesces normal copies."
This reverts commit r197414.
It broke the ppc64 bootstrap. I will post a testcase in a sec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197424 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197418 91177308-0d34-0410-b5e6-96231b3b80d8
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WebKit_JS calling convention.
Pass the first integer argument (callee) in register to optimize inline caches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197416 91177308-0d34-0410-b5e6-96231b3b80d8
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that it coalesces normal copies.
Without this, MachineCSE is powerless to handle redundant operations
with truncated source operands.
This required fixing the 2-addr pass to handle tied subregisters. It
isn't clear what combinations of subregisters can legally be tied, but
the simple case of truncated source operands is now safely handled:
%vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1
%vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2
%vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197414 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197413 91177308-0d34-0410-b5e6-96231b3b80d8
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Produce them in the same order on every target. The order is that of
getStringRepresentation: e|E-i*-f*-v*-a*-s*-n*-S*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197411 91177308-0d34-0410-b5e6-96231b3b80d8
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While there, simplify "p3:32:32:32" to "p3:32:32".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197407 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197405 91177308-0d34-0410-b5e6-96231b3b80d8
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Floating-point Compare to Zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197402 91177308-0d34-0410-b5e6-96231b3b80d8
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This was manifesting as an LLVM_ASSUME_ALIGNED() failure in an ELF debug
info test when building LLVM with clang in the Microsoft C++ ABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197401 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197400 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197398 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197397 91177308-0d34-0410-b5e6-96231b3b80d8
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PowerPC now has an asm parser (and has for many months now); indicate this in
PowerPC/LLVMBuild.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197393 91177308-0d34-0410-b5e6-96231b3b80d8
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Added scalar compare VCMPSS, VCMPSD.
Implemented LowerSELECT for scalar FP operations.
I replaced FSETCCss, FSETCCsd with one node type FSETCCs.
Node extract_vector_elt(v16i1/v8i1, idx) returns an element of type i1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197384 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197366 91177308-0d34-0410-b5e6-96231b3b80d8
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Currently we have such types as legal vector types. The DAG combiner may generate some DAG nodes having such types but we don't have patterns to match them.
E.g. a load i32 and a bitcast i32 to v1i32 will be combined into a load v1i32:
bitcast (load i32) to v1i32 -> load v1i32.
So this patch fixes such problems for load/dup instructions.
If v1i8/v1i16/v1i32 are not legal any more, the code in this patch can be deleted. So I also add some FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197361 91177308-0d34-0410-b5e6-96231b3b80d8
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that follows).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197358 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197357 91177308-0d34-0410-b5e6-96231b3b80d8
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part of a multi-line pseudo which worked around a linker bug for mips16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197356 91177308-0d34-0410-b5e6-96231b3b80d8
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Some tiny cosmetic code changes to follow. Because of the wide
ranging nature of the patch a full 24 test cycle was needed to
check against regression. This was the smallest patch I could
make to progress from the earlier ones in the series.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197350 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197348 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197335 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197332 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197329 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197327 91177308-0d34-0410-b5e6-96231b3b80d8
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This is a base implementation of the powerpc-apple-darwin asm parser dialect.
* Enables infrastructure (essentially isDarwin()) and fixes up the parsing of asm directives to separate out ELF and MachO/Darwin additions.
* Enables parsing of {r,f,v}XX as register identifiers.
* Enables parsing of lo16() hi16() and ha16() as modifiers.
The changes to the test case are from David Fang (fangism).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197324 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197323 91177308-0d34-0410-b5e6-96231b3b80d8
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This optional register liveness analysis pass can be enabled with either
-enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass
traverses each basic block in a machine function. For each basic block the
instructions are processed in reversed order and if a patchpoint or stackmap
instruction is encountered the current live-out register set is encoded as a
register mask and attached to the instruction.
Later on during stackmap generation the live-out register mask is processed and
also emitted as part of the stackmap.
This information is optional and intended for optimization purposes only. This
will enable a client of the stackmap to reason about the registers it can use
and which registers need to be preserved.
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197317 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197316 91177308-0d34-0410-b5e6-96231b3b80d8
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of just register units.
Reviewed by Andy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197315 91177308-0d34-0410-b5e6-96231b3b80d8
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197312 91177308-0d34-0410-b5e6-96231b3b80d8
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197311 91177308-0d34-0410-b5e6-96231b3b80d8
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No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197310 91177308-0d34-0410-b5e6-96231b3b80d8
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getBlockFreq() in all *BlockFrequencyInfo*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197304 91177308-0d34-0410-b5e6-96231b3b80d8
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between a BasicBlock and one of its successors.
IMHO At some point BasicBlock should be refactored along the lines of
MachineBasicBlock so that successors/weights are actually embedded within the
block. Now is not that time though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197303 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197302 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197297 91177308-0d34-0410-b5e6-96231b3b80d8
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MachineBlockFrequencyInfo methods.
This is slightly more interesting than the previous batch of changes.
Specifically:
1. We refactor getSpillWeight to take a MachineBlockFrequencyInfo (MBFI)
object. This enables us to completely encapsulate the actual manner we
use the MachineBlockFrequencyInfo to get our spill weights. This yields
cleaner code since one does not need to fetch the actual block frequency
before getting the spill weight if all one wants it the spill weight. It
also gives us access to entry frequency which we need for our
computation.
2. Instead of having getSpillWeight take a MachineBasicBlock (as one
might think) to look up the block frequency via the MBFI object, we
instead take in a MachineInstr object. The reason for this is that the
method is supposed to return the spill weight for an instruction
according to the comments around the function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197296 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197292 91177308-0d34-0410-b5e6-96231b3b80d8
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get the entry frequency while processing data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197291 91177308-0d34-0410-b5e6-96231b3b80d8
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MachineBlockFrequencyInfo methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197290 91177308-0d34-0410-b5e6-96231b3b80d8
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new print methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197289 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197288 91177308-0d34-0410-b5e6-96231b3b80d8
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BlockFrequencyInfo that were added to BlockFrequencyImpl in r197285 and r197284.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197287 91177308-0d34-0410-b5e6-96231b3b80d8
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Also update for the current naming style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197283 91177308-0d34-0410-b5e6-96231b3b80d8
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were falling into the cases for 24-bit branch kinds which are not 24-bit
branches. The routine is to return false for fixups are expected to always
be resolvable at assembly time. Which these three fixups are as they have
limited displacement and are for local references within a function.
rdar://15586725
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197282 91177308-0d34-0410-b5e6-96231b3b80d8
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